Lines Matching defs:value
132 // Clobbers object, dst, value, and ra, if (ra_status == kRAHasBeenSaved)
136 Register value, Register dst,
142 DCHECK(!AreAliased(value, dst, t8, object));
149 JumpIfSmi(value, &done);
166 RecordWrite(object, dst, value, ra_status, save_fp, remembered_set_action,
174 li(value, Operand(bit_cast<int64_t>(kZapValue + 4)));
268 // Clobbers object, address, value, and ra, if (ra_status == kRAHasBeenSaved)
272 Register value, RAStatus ra_status,
276 DCHECK(!AreAliased(object, address, value, t8));
277 DCHECK(!AreAliased(object, address, value, t9));
282 DCHECK(!AreAliased(object, value, scratch));
285 Operand(value));
300 JumpIfSmi(value, &done);
303 CheckPageFlag(value,
304 value, // Used as scratch.
307 value, // Used as scratch.
316 DCHECK(!AreAliased(object, slot_address, value));
330 li(value, Operand(bit_cast<int64_t>(kZapValue + 16)));
1524 void TurboAssembler::li(Register dst, Handle<HeapObject> value, LiFlags mode) {
1527 // embedding the relocatable value.
1529 IndirectLoadConstant(dst, value);
1532 li(dst, Operand(value), mode);
1535 void TurboAssembler::li(Register dst, ExternalReference value, LiFlags mode) {
1538 // embedding the relocatable value.
1540 IndirectLoadExternalReference(dst, value);
1543 li(dst, Operand(value), mode);
1551 static inline int InstrCountForLiLower32Bit(int64_t value) {
1552 if (!is_int16(static_cast<int32_t>(value)) && (value & kUpper16MaskOf64) &&
1553 (value & kImm16Mask)) {
1573 static inline int InstrCountForLoadReplicatedConst32(int64_t value) {
1574 uint32_t x = static_cast<uint32_t>(value);
1575 uint32_t y = static_cast<uint32_t>(value >> 32);
1584 int TurboAssembler::InstrCountForLi64Bit(int64_t value) {
1585 if (is_int32(value)) {
1586 return InstrCountForLiLower32Bit(value);
1588 int bit31 = value >> 31 & 0x1;
1589 if ((value & kUpper16MaskOf64) == 0 && is_int16(value >> 32) &&
1592 } else if ((value & (kHigher16MaskOf64 | kUpper16MaskOf64)) == 0 &&
1595 } else if ((value & kImm16Mask) == 0 && is_int16((value >> 32) + bit31) &&
1598 } else if ((value & kImm16Mask) == 0 &&
1599 ((value >> 31) & 0x1FFFF) == ((0x20000 - bit31) & 0x1FFFF) &&
1602 } else if (is_int16(static_cast<int32_t>(value)) &&
1603 is_int16((value >> 32) + bit31) && kArchVariant == kMips64r6) {
1605 } else if (is_int16(static_cast<int32_t>(value)) &&
1606 ((value >> 31) & 0x1FFFF) == ((0x20000 - bit31) & 0x1FFFF) &&
1609 } else if (base::bits::IsPowerOfTwo(value + 1) ||
1610 value == std::numeric_limits<int64_t>::max()) {
1613 int shift_cnt = base::bits::CountTrailingZeros64(value);
1614 int rep32_count = InstrCountForLoadReplicatedConst32(value);
1615 int64_t tmp = value >> shift_cnt;
1625 shift_cnt = 16 + base::bits::CountTrailingZeros64(value >> 16);
1626 tmp = value >> shift_cnt;
1634 int64_t imm = value;
1646 if (is_int48(value)) {
1647 int64_t k = value >> 16;
1649 if (value & kImm16Mask) {
1654 int64_t k = value >> 32;
1656 if ((value >> 16) & kImm16Mask) {
1658 if (value & kImm16Mask) {
1663 if (value & kImm16Mask) {
1684 // Normal load of an immediate value which does not need Relocation Info.
1691 // 64-bit value which consists of an unsigned 16-bit value in its
1692 // least significant 32-bits, and a signed 16-bit value in its
1698 // 64-bit value which consists of an unsigned 16-bit value in its
1699 // least significant 48-bits, and a signed 16-bit value in its
1707 // 48 MSBs (Most Significant Bits) hold a signed 32-bit value.
1715 // 48 MSBs hold a signed value which can't be represented by signed
1750 // Value can be computed by loading a 16-bit unsigned value, and
1759 // Value can be computed by loading a 16-bit signed value, and
1769 // value loaded into the 32 LSBs can be loaded with a single
1775 // Value can be computed by loading a 32-bit signed value, and
1788 // Value can be computed by loading a 16-bit unsigned value,
1789 // shifting left, and "or"ing in another 16-bit unsigned value.
1798 // Value can be computed by loading a 16-bit signed value,
1799 // shifting left, and "or"ing in a 16-bit unsigned value.
1809 // value in the 32 LSBs requires 2 MIPS instructions to load.
1893 // this code to load another value which may need all 4 instructions.
2082 // For NaN input, neg_s will return the same NaN value,
2107 // For NaN input, neg_d will return the same NaN value,
2129 // Convert rs to a FP value in fd.
2148 // Convert rs to a FP value in fd.
2183 // Convert rs to a FP value in fd.
2202 // Convert rs to a FP value in fd.
3251 uint32_t value = 0x01010101; // (T)~(T)0/255
3271 li(scratch, value);
3281 uint64_t value = 0x0101010101010101l; // (T)~(T)0/255
3301 li(scratch, value);
4354 void MacroAssembler::JumpIfIsInRange(Register value, unsigned lower_limit,
4361 Dsubu(scratch, value, Operand(lower_limit));
4364 Branch(on_in_range, ls, value, Operand(higher_limit - lower_limit));
4472 // Adjust the value in ra to point to the correct return location, 2nd
4763 Move(dst, f0); // Reg f0 is o32 ABI FP return value.
4775 Move(dst, f12); // Reg f12 is n64 ABI FP first argument value.
4877 // to push undefined value as arguments.
5172 // All parameters are on the stack. v0 has the return value after call.
5221 void MacroAssembler::EmitIncrementCounter(StatsCounter* counter, int value,
5224 DCHECK_GT(value, 0);
5232 Addu(scratch1, scratch1, Operand(value));
5237 void MacroAssembler::EmitDecrementCounter(StatsCounter* counter, int value,
5240 DCHECK_GT(value, 0);
5248 Subu(scratch1, scratch1, Operand(value));
5314 // generated instructions is 10, so we use this as a maximum value.
5419 // Remember: we only need to save every 2nd double FPU value.
5427 // (used by DirectCEntry to hold the return value if a struct is
5436 // Set the exit frame sp value to point just before the return address
5451 // Remember: we only need to restore every 2nd double FPU value.
5547 void TurboAssembler::JumpIfSmi(Register value, Label* smi_label,
5552 andi(scratch, value, kSmiTagMask);
5556 void MacroAssembler::JumpIfNotSmi(Register value, Label* not_smi_label,
5561 andi(scratch, value, kSmiTagMask);
5929 // and the original value of sp.