Lines Matching refs:format
3214 #define MSA_I10(name, format) \
3216 GenInstrMsaI10(LDI, format, imm10, wd); \
3235 #define MSA_I5_FORMAT(name, opcode, format) \
3236 void Assembler::name##_##format(MSARegister wd, MSARegister ws, \
3238 GenInstrMsaI5(opcode, I5_DF_##format, imm5, ws, wd); \
3296 #define MSA_2R_FORMAT(name, opcode, format) \
3297 void Assembler::name##_##format(MSARegister wd, MSARegister ws) { \
3298 GenInstrMsa2R(opcode, MSA_2R_DF_##format, ws, wd); \
3312 #define MSA_FILL(format) \
3313 void Assembler::fill_##format(MSARegister wd, Register rs) { \
3316 Instr instr = MSA | MSA_2R_FORMAT | FILL | MSA_2R_DF_##format | \
3346 #define MSA_2RF_FORMAT(name, opcode, format) \
3347 void Assembler::name##_##format(MSARegister wd, MSARegister ws) { \
3348 GenInstrMsa2RF(opcode, MSA_2RF_DF_##format, ws, wd); \
3423 #define MSA_3R_FORMAT(name, opcode, format) \
3424 void Assembler::name##_##format(MSARegister wd, MSARegister ws, \
3426 GenInstrMsa3R<MSARegister>(opcode, MSA_3R_DF_##format, wt, ws, wd); \
3429 #define MSA_3R_FORMAT_SLD_SPLAT(name, opcode, format) \
3430 void Assembler::name##_##format(MSARegister wd, MSARegister ws, \
3432 GenInstrMsa3R<Register>(opcode, MSA_3R_DF_##format, rt, ws, wd); \
3654 #define MSA_BIT_FORMAT(name, opcode, format) \
3655 void Assembler::name##_##format(MSARegister wd, MSARegister ws, \
3657 GenInstrMsaBit(opcode, BIT_DF_##format, m, ws, wd); \