Lines Matching defs:instr
346 Register Assembler::GetRtReg(Instr instr) {
347 return Register::from_code((instr & kRtFieldMask) >> kRtShift);
350 Register Assembler::GetRsReg(Instr instr) {
351 return Register::from_code((instr & kRsFieldMask) >> kRsShift);
354 Register Assembler::GetRdReg(Instr instr) {
355 return Register::from_code((instr & kRdFieldMask) >> kRdShift);
358 uint32_t Assembler::GetRt(Instr instr) {
359 return (instr & kRtFieldMask) >> kRtShift;
362 uint32_t Assembler::GetRtField(Instr instr) { return instr & kRtFieldMask; }
364 uint32_t Assembler::GetRs(Instr instr) {
365 return (instr & kRsFieldMask) >> kRsShift;
368 uint32_t Assembler::GetRsField(Instr instr) { return instr & kRsFieldMask; }
370 uint32_t Assembler::GetRd(Instr instr) {
371 return (instr & kRdFieldMask) >> kRdShift;
374 uint32_t Assembler::GetRdField(Instr instr) { return instr & kRdFieldMask; }
376 uint32_t Assembler::GetSa(Instr instr) {
377 return (instr & kSaFieldMask) >> kSaShift;
380 uint32_t Assembler::GetSaField(Instr instr) { return instr & kSaFieldMask; }
382 uint32_t Assembler::GetOpcodeField(Instr instr) { return instr & kOpcodeMask; }
384 uint32_t Assembler::GetFunction(Instr instr) {
385 return (instr & kFunctionFieldMask) >> kFunctionShift;
388 uint32_t Assembler::GetFunctionField(Instr instr) {
389 return instr & kFunctionFieldMask;
392 uint32_t Assembler::GetImmediate16(Instr instr) { return instr & kImm16Mask; }
394 uint32_t Assembler::GetLabelConst(Instr instr) { return instr & ~kImm16Mask; }
396 bool Assembler::IsPop(Instr instr) {
397 return (instr & ~kRtMask) == kPopRegPattern;
400 bool Assembler::IsPush(Instr instr) {
401 return (instr & ~kRtMask) == kPushRegPattern;
404 bool Assembler::IsSwRegFpOffset(Instr instr) {
405 return ((instr & kLwSwInstrTypeMask) == kSwRegFpOffsetPattern);
408 bool Assembler::IsLwRegFpOffset(Instr instr) {
409 return ((instr & kLwSwInstrTypeMask) == kLwRegFpOffsetPattern);
412 bool Assembler::IsSwRegFpNegOffset(Instr instr) {
413 return ((instr & (kLwSwInstrTypeMask | kNegOffset)) ==
417 bool Assembler::IsLwRegFpNegOffset(Instr instr) {
418 return ((instr & (kLwSwInstrTypeMask | kNegOffset)) ==
441 bool Assembler::IsMsaBranch(Instr instr) {
442 uint32_t opcode = GetOpcodeField(instr);
443 uint32_t rs_field = GetRsField(instr);
465 bool Assembler::IsBranch(Instr instr) {
466 uint32_t opcode = GetOpcodeField(instr);
467 uint32_t rt_field = GetRtField(instr);
468 uint32_t rs_field = GetRsField(instr);
477 (opcode == COP1 && rs_field == BC1NEZ) || IsMsaBranch(instr);
489 bool Assembler::IsBc(Instr instr) {
490 uint32_t opcode = GetOpcodeField(instr);
495 bool Assembler::IsNal(Instr instr) {
496 uint32_t opcode = GetOpcodeField(instr);
497 uint32_t rt_field = GetRtField(instr);
498 uint32_t rs_field = GetRsField(instr);
502 bool Assembler::IsBzc(Instr instr) {
503 uint32_t opcode = GetOpcodeField(instr);
505 return (opcode == POP66 && GetRsField(instr) != 0) ||
506 (opcode == POP76 && GetRsField(instr) != 0);
509 bool Assembler::IsEmittedConstant(Instr instr) {
510 uint32_t label_constant = GetLabelConst(instr);
514 bool Assembler::IsBeq(Instr instr) { return GetOpcodeField(instr) == BEQ; }
516 bool Assembler::IsBne(Instr instr) { return GetOpcodeField(instr) == BNE; }
518 bool Assembler::IsBeqzc(Instr instr) {
519 uint32_t opcode = GetOpcodeField(instr);
520 return opcode == POP66 && GetRsField(instr) != 0;
523 bool Assembler::IsBnezc(Instr instr) {
524 uint32_t opcode = GetOpcodeField(instr);
525 return opcode == POP76 && GetRsField(instr) != 0;
528 bool Assembler::IsBeqc(Instr instr) {
529 uint32_t opcode = GetOpcodeField(instr);
530 uint32_t rs = GetRsField(instr);
531 uint32_t rt = GetRtField(instr);
535 bool Assembler::IsBnec(Instr instr) {
536 uint32_t opcode = GetOpcodeField(instr);
537 uint32_t rs = GetRsField(instr);
538 uint32_t rt = GetRtField(instr);
542 bool Assembler::IsMov(Instr instr, Register rd, Register rs) {
543 uint32_t opcode = GetOpcodeField(instr);
544 uint32_t rd_field = GetRd(instr);
545 uint32_t rs_field = GetRs(instr);
546 uint32_t rt_field = GetRt(instr);
549 uint32_t function_field = GetFunctionField(instr);
556 bool Assembler::IsJump(Instr instr) {
557 uint32_t opcode = GetOpcodeField(instr);
558 uint32_t rt_field = GetRtField(instr);
559 uint32_t rd_field = GetRdField(instr);
560 uint32_t function_field = GetFunctionField(instr);
568 bool Assembler::IsJ(Instr instr) {
569 uint32_t opcode = GetOpcodeField(instr);
574 bool Assembler::IsJal(Instr instr) { return GetOpcodeField(instr) == JAL; }
576 bool Assembler::IsJr(Instr instr) {
577 return GetOpcodeField(instr) == SPECIAL && GetFunctionField(instr) == JR;
580 bool Assembler::IsJalr(Instr instr) {
581 return GetOpcodeField(instr) == SPECIAL && GetFunctionField(instr) == JALR;
584 bool Assembler::IsLui(Instr instr) {
585 uint32_t opcode = GetOpcodeField(instr);
590 bool Assembler::IsOri(Instr instr) {
591 uint32_t opcode = GetOpcodeField(instr);
596 bool Assembler::IsNop(Instr instr, unsigned int type) {
599 uint32_t opcode = GetOpcodeField(instr);
600 uint32_t function = GetFunctionField(instr);
601 uint32_t rt = GetRt(instr);
602 uint32_t rd = GetRd(instr);
603 uint32_t sa = GetSa(instr);
618 int32_t Assembler::GetBranchOffset(Instr instr) {
619 DCHECK(IsBranch(instr));
620 return (static_cast<int16_t>(instr & kImm16Mask)) << 2;
623 bool Assembler::IsLw(Instr instr) {
624 return (static_cast<uint32_t>(instr & kOpcodeMask) == LW);
627 int16_t Assembler::GetLwOffset(Instr instr) {
628 DCHECK(IsLw(instr));
629 return ((instr & kImm16Mask));
632 Instr Assembler::SetLwOffset(Instr instr, int16_t offset) {
633 DCHECK(IsLw(instr));
636 Instr temp_instr = LW | (instr & kRsFieldMask) | (instr & kRtFieldMask) |
642 bool Assembler::IsSw(Instr instr) {
643 return (static_cast<uint32_t>(instr & kOpcodeMask) == SW);
646 Instr Assembler::SetSwOffset(Instr instr, int16_t offset) {
647 DCHECK(IsSw(instr));
648 return ((instr & ~kImm16Mask) | (offset & kImm16Mask));
651 bool Assembler::IsAddImmediate(Instr instr) {
652 return ((instr & kOpcodeMask) == ADDIU || (instr & kOpcodeMask) == DADDIU);
655 Instr Assembler::SetAddImmediateOffset(Instr instr, int16_t offset) {
656 DCHECK(IsAddImmediate(instr));
657 return ((instr & ~kImm16Mask) | (offset & kImm16Mask));
660 bool Assembler::IsAndImmediate(Instr instr) {
661 return GetOpcodeField(instr) == ANDI;
664 static Assembler::OffsetSize OffsetSizeInBits(Instr instr) {
666 if (Assembler::IsBc(instr)) {
668 } else if (Assembler::IsBzc(instr)) {
675 static inline int32_t AddBranchOffset(int pos, Instr instr) {
676 int bits = OffsetSizeInBits(instr);
682 int32_t imm = ((instr & mask) << bits) >> (bits - 2);
706 Instr instr = instr_at(pos);
707 if ((instr & ~kImm16Mask) == 0) {
709 if (instr == 0) {
712 int32_t imm18 = ((instr & static_cast<int32_t>(kImm16Mask)) << 16) >> 14;
717 DCHECK(IsBranch(instr) || IsJ(instr) || IsJal(instr) || IsLui(instr) ||
718 IsMov(instr, t8, ra));
721 if (IsBranch(instr)) {
722 return AddBranchOffset(pos, instr);
723 } else if (IsMov(instr, t8, ra)) {
736 } else if (IsLui(instr)) {
776 DCHECK(IsJ(instr) || IsJal(instr));
777 int32_t imm28 = (instr & static_cast<int32_t>(kImm26Mask)) << 2;
790 Instr instr) {
791 int32_t bits = OffsetSizeInBits(instr);
797 instr &= ~mask;
800 return instr | (imm & mask);
809 Instr instr = instr_at(pos);
810 if ((instr & ~kImm16Mask) == 0) {
818 if (IsBranch(instr)) {
819 instr = SetBranchOffset(pos, target_pos, instr);
820 instr_at_put(pos, instr);
821 } else if (IsLui(instr)) {
870 } else if (IsMov(instr, t8, ra)) {
907 } else if (IsJ(instr) || IsJal(instr)) {
915 int32_t mark = IsJ(instr) ? kJRawMark : kJalRawMark;
925 instr &= ~kImm26Mask;
926 instr_at_put(pos, instr | (imm26 & kImm26Mask));
941 Instr instr = instr_at(l.pos());
942 if ((instr & ~kImm16Mask) == 0) {
945 PrintF("%d\n", instr);
971 Instr instr = instr_at(fixup_pos);
975 if (IsBranch(instr)) {
976 int branch_offset = BranchOffset(instr);
988 DCHECK(IsJ(instr) || IsJal(instr) || IsLui(instr) ||
989 IsEmittedConstant(instr) || IsMov(instr, t8, ra));
1033 int Assembler::BranchOffset(Instr instr) {
1038 uint32_t opcode = GetOpcodeField(instr);
1049 if (GetRsField(instr) != 0) bits = OffsetSize::kOffset21;
1071 Instr instr = opcode | (rs.code() << kRsShift) | (rt.code() << kRtShift) |
1073 emit(instr);
1080 Instr instr = opcode | (rs.code() << kRsShift) | (rt.code() << kRtShift) |
1082 emit(instr);
1089 Instr instr = opcode | fmt | (ft.code() << kFtShift) |
1091 emit(instr);
1098 Instr instr = opcode | (fr.code() << kFrShift) | (ft.code() << kFtShift) |
1100 emit(instr);
1107 Instr instr = opcode | fmt | (rt.code() << kRtShift) |
1109 emit(instr);
1115 Instr instr =
1117 emit(instr);
1126 Instr instr = opcode | (rs.code() << kRsShift) | (rt.code() << kRtShift) |
1128 emit(instr, is_compact_branch);
1136 Instr instr = opcode | (base.code() << kBaseShift) | (rt.code() << kRtShift) |
1139 emit(instr);
1146 Instr instr = opcode | (rs.code() << kRsShift) | SF | (j & kImm16Mask);
1147 emit(instr, is_compact_branch);
1154 Instr instr = opcode | (rs.code() << kRsShift) | (ft.code() << kFtShift) |
1156 emit(instr, is_compact_branch);
1162 Instr instr = opcode | (rs.code() << kRsShift) | (offset21 & kImm21Mask);
1163 emit(instr, is_compact_branch);
1169 Instr instr = opcode | (rs.code() << kRsShift) | (offset21 & kImm21Mask);
1170 emit(instr);
1176 Instr instr = opcode | (offset26 & kImm26Mask);
1177 emit(instr, is_compact_branch);
1183 Instr instr = opcode | address;
1184 emit(instr);
1193 Instr instr = MSA | operation | ((imm8 & kImm8Mask) << kWtShift) |
1195 emit(instr);
1207 Instr instr = MSA | operation | df | ((imm5 & kImm5Mask) << kWtShift) |
1209 emit(instr);
1216 Instr instr = MSA | operation | df | (m << kWtShift) |
1218 emit(instr);
1225 Instr instr = MSA | operation | df | ((imm10 & kImm10Mask) << kWsShift) |
1227 emit(instr);
1235 Instr instr = MSA | operation | df | (t.code() << kWtShift) |
1237 emit(instr);
1245 Instr instr = MSA | operation | df | (n << kWtShift) |
1248 emit(instr);
1256 Instr instr = MSA | operation | (df << 21) | (wt.code() << kWtShift) |
1258 emit(instr);
1265 Instr instr = MSA | operation | (wt.code() << kWtShift) |
1268 emit(instr);
1275 Instr instr = MSA | operation | ((s10 & kImm10Mask) << kWtShift) |
1277 emit(instr);
1284 Instr instr = MSA | MSA_2R_FORMAT | operation | df | (ws.code() << kWsShift) |
1286 emit(instr);
1293 Instr instr = MSA | MSA_2RF_FORMAT | operation | df |
1296 emit(instr);
1304 Instr instr =
1306 emit(instr);
1927 Instr instr = SPECIAL | (1 << kRsShift) | (rt.code() << kRtShift) |
1929 emit(instr);
1936 Instr instr = SPECIAL | (rs.code() << kRsShift) | (rt.code() << kRtShift) |
1938 emit(instr);
1959 Instr instr = SPECIAL | (1 << kRsShift) | (rt.code() << kRtShift) |
1961 emit(instr);
1966 Instr instr = SPECIAL | (1 << kRsShift) | (rt.code() << kRtShift) |
1968 emit(instr);
1973 Instr instr = SPECIAL | (rs.code() << kRsShift) | (rt.code() << kRtShift) |
1975 emit(instr);
2002 Instr instr = SPECIAL | rs.code() << kRsShift | rt.code() << kRtShift |
2004 emit(instr);
2011 Instr instr = SPECIAL | rs.code() << kRsShift | rt.code() << kRtShift |
2013 emit(instr);
2379 Instr instr =
2381 emit(instr);
2386 Instr instr = SPECIAL | TGEU | rs.code() << kRsShift | rt.code() << kRtShift |
2388 emit(instr);
2393 Instr instr =
2395 emit(instr);
2400 Instr instr = SPECIAL | TLTU | rs.code() << kRsShift | rt.code() << kRtShift |
2402 emit(instr);
2407 Instr instr =
2409 emit(instr);
2414 Instr instr =
2416 emit(instr);
2531 // clz instr requires same GPR number in 'rd' and 'rt' fields.
2540 // dclz instr requires same GPR number in 'rd' and 'rt' fields.
2549 // ins instr has 'rt' field as dest, and two uint5: msb, lsb.
2556 // dins instr has 'rt' field as dest, and two uint5: msb, lsb.
2563 // dinsm instr has 'rt' field as dest, and two uint5: msbminus32, lsb.
2570 // dinsu instr has 'rt' field as dest, and two uint5: msbminus32, lsbminus32.
2577 // ext instr has 'rt' field as dest, and two uint5: msbd, lsb.
2584 // dext instr has 'rt' field as dest, and two uint5: msbd, lsb.
2591 // dextm instr has 'rt' field as dest, and two uint5: msbdminus32, lsb.
2598 // dextu instr has 'rt' field as dest, and two uint5: msbd, lsbminus32.
2615 Instr instr =
2617 emit(instr);
3080 Instr instr = COP1 | fmt | ft.code() << kFtShift | fs.code() << kFsShift |
3082 emit(instr);
3098 Instr instr = COP1 | BC1EQZ | ft.code() << kFtShift | (offset & kImm16Mask);
3099 emit(instr);
3106 Instr instr = COP1 | BC1NEZ | ft.code() << kFtShift | (offset & kImm16Mask);
3107 emit(instr);
3118 Instr instr = COP1 | fmt | ft.code() << kFtShift | fs.code() << kFsShift |
3120 emit(instr);
3143 Instr instr = COP1 | BC1 | cc << 18 | 0 << 16 | (offset & kImm16Mask);
3144 emit(instr);
3151 Instr instr = COP1 | BC1 | cc << 18 | 1 << 16 | (offset & kImm16Mask);
3152 emit(instr);
3316 Instr instr = MSA | MSA_2R_FORMAT | FILL | MSA_2R_DF_##format | \
3319 emit(instr); \
3619 Instr instr = MSA | MOVE_V | (ws.code() << kWsShift) |
3621 emit(instr);
3627 Instr instr = MSA | CTCMSA | (rs.code() << kWsShift) |
3629 emit(instr);
3635 Instr instr = MSA | CFCMSA | (cs.code() << kWsShift) |
3637 emit(instr);
3681 Instr instr = instr_at(pc);
3683 if (IsLui(instr)) {
3710 } else if (IsJ(instr) || IsJal(instr)) {
3712 uint32_t imm28 = (instr & static_cast<int32_t>(kImm26Mask)) << 2;
3715 instr &= ~kImm26Mask;
3718 instr_at_put(pc, instr | (imm26 & kImm26Mask));
3721 DCHECK(((instr & kJumpRawMask) == kJRawMark) ||
3722 ((instr & kJumpRawMask) == kJalRawMark));
3724 int32_t imm28 = (instr & static_cast<int32_t>(kImm26Mask)) << 2;
3733 uint32_t unbox = (instr & kJRawMark) ? J : JAL;