Lines Matching refs:code
8 // - Redistributions of source code must retain the above copyright notice,
31 // The original source code covered by the above license above has been
60 // If the compiler is allowed to use FPU then we can use FPU too in our code
79 // code generation.
167 return kNumbers[reg.code()];
189 // always the case inside code objects.
262 const Instr kPopInstruction = ADDIU | (sp.code() << kRsShift) |
263 (sp.code() << kRtShift) |
266 const Instr kPushInstruction = ADDIU | (sp.code() << kRsShift) |
267 (sp.code() << kRtShift) |
270 const Instr kPushRegPattern = SW | (sp.code() << kRsShift) | (0 & kImm16Mask);
272 const Instr kPopRegPattern = LW | (sp.code() << kRsShift) | (0 & kImm16Mask);
275 LW | (fp.code() << kRsShift) | (0 & kImm16Mask);
278 SW | (fp.code() << kRsShift) | (0 & kImm16Mask);
281 LW | (fp.code() << kRsShift) | (kNegOffset & kImm16Mask);
284 SW | (fp.code() << kRsShift) | (kNegOffset & kImm16Mask);
320 // metadata table builders (safepoint, handler, constant pool, code
332 // Set up code descriptor.
444 // Labels refer to positions in the (to be) generated code.
448 // generated code. pos() is the position the label refers to.
450 // Linked labels refer to unknown positions in the code
457 // code is conv to an 18-bit value addressing bytes, hence the -4 value.
622 uint32_t rd_reg = static_cast<uint32_t>(rd.code());
623 uint32_t rs_reg = static_cast<uint32_t>(rs.code());
624 uint32_t rt_reg = static_cast<uint32_t>(rt.code());
635 uint32_t rd_reg = static_cast<uint32_t>(rd.code());
636 uint32_t rs_reg = static_cast<uint32_t>(rs.code());
970 Instr instr_a = ADDIU | ra.code() << kRsShift | ra.code() << kRtShift |
1142 Instr instr = opcode | (rs.code() << kRsShift) | (rt.code() << kRtShift) |
1143 (rd.code() << kRdShift) | (sa << kSaShift) | func;
1151 Instr instr = opcode | (rs.code() << kRsShift) | (rt.code() << kRtShift) |
1160 Instr instr = opcode | fmt | (ft.code() << kFtShift) |
1161 (fs.code() << kFsShift) | (fd.code() << kFdShift) | func;
1169 Instr instr = opcode | (fr.code() << kFrShift) | (ft.code() << kFtShift) |
1170 (fs.code() << kFsShift) | (fd.code() << kFdShift) | func;
1178 Instr instr = opcode | fmt | (rt.code() << kRtShift) |
1179 (fs.code() << kFsShift) | (fd.code() << kFdShift) | func;
1187 opcode | fmt | (rt.code() << kRtShift) | (fs.code() << kFsShift) | func;
1197 Instr instr = opcode | (rs.code() << kRsShift) | (rt.code() << kRtShift) |
1207 Instr instr = opcode | (base.code() << kBaseShift) | (rt.code() << kRtShift) |
1217 Instr instr = opcode | (rs.code() << kRsShift) | SF | (j & kImm16Mask);
1225 Instr instr = opcode | (rs.code() << kRsShift) | (ft.code() << kFtShift) |
1233 Instr instr = opcode | (rs.code() << kRsShift) | (offset21 & kImm21Mask);
1240 Instr instr = opcode | (rs.code() << kRsShift) | (offset21 & kImm21Mask);
1265 (ws.code() << kWsShift) | (wd.code() << kWdShift);
1279 (ws.code() << kWsShift) | (wd.code() << kWdShift);
1288 (ws.code() << kWsShift) | (wd.code() << kWdShift);
1297 (wd.code() << kWdShift);
1306 Instr instr = MSA | operation | df | (t.code() << kWtShift) |
1307 (ws.code() << kWsShift) | (wd.code() << kWdShift);
1317 (src.code() << kWsShift) | (dst.code() << kWdShift) |
1327 Instr instr = MSA | operation | (df << 21) | (wt.code() << kWtShift) |
1328 (ws.code() << kWsShift) | (wd.code() << kWdShift);
1336 Instr instr = MSA | operation | (wt.code() << kWtShift) |
1337 (ws.code() << kWsShift) | (wd.code() << kWdShift) |
1347 (rs.code() << kWsShift) | (wd.code() << kWdShift);
1355 Instr instr = MSA | MSA_2R_FORMAT | operation | df | (ws.code() << kWsShift) |
1356 (wd.code() << kWdShift) | MSA_VEC_2R_2RF_MINOR;
1365 (ws.code() << kWsShift) | (wd.code() << kWdShift) |
1376 COP1 | operation | (wt.code() << kWtShift) | (offset16 & kImm16Mask);
1531 DCHECK(rs.code() != rt.code());
1539 DCHECK(rs.code() != rt.code());
1587 DCHECK(rs.code() != rt.code());
1595 DCHECK(rs.code() != rt.code());
1621 if (rs.code() >= rt.code()) {
1630 if (rs.code() >= rt.code()) {
1694 DCHECK(rs.code() != rt.code() && rs.code() != 0 && rt.code() != 0);
1695 if (rs.code() < rt.code()) {
1710 DCHECK(rs.code() != rt.code() && rs.code() != 0 && rt.code() != 0);
1711 if (rs.code() < rt.code()) {
1761 DCHECK(rs.code() != rd.code());
1919 Instr instr = SPECIAL | (1 << kRsShift) | (rt.code() << kRtShift) |
1920 (rd.code() << kRdShift) | (sa << kSaShift) | SRL;
1928 Instr instr = SPECIAL | (rs.code() << kRsShift) | (rt.code() << kRtShift) |
1929 (rd.code() << kRdShift) | (1 << kSaShift) | SRLV;
1937 Instr instr = SPECIAL | rs.code() << kRsShift | rt.code() << kRtShift |
1938 rd.code() << kRdShift | sa << kSaShift | LSA;
2216 void Assembler::break_(uint32_t code, bool break_as_stop) {
2217 DCHECK_EQ(code & ~0xFFFFF, 0);
2222 (break_as_stop && code <= kMaxStopCode && code > kMaxWatchpointCode) ||
2223 (!break_as_stop && (code > kMaxStopCode || code <= kMaxWatchpointCode)));
2224 Instr break_instr = SPECIAL | BREAK | (code << 6);
2228 void Assembler::stop(uint32_t code) {
2229 DCHECK_GT(code, kMaxWatchpointCode);
2230 DCHECK_LE(code, kMaxStopCode);
2234 break_(code, true);
2238 void Assembler::tge(Register rs, Register rt, uint16_t code) {
2239 DCHECK(is_uint10(code));
2241 SPECIAL | TGE | rs.code() << kRsShift | rt.code() << kRtShift | code << 6;
2245 void Assembler::tgeu(Register rs, Register rt, uint16_t code) {
2246 DCHECK(is_uint10(code));
2247 Instr instr = SPECIAL | TGEU | rs.code() << kRsShift | rt.code() << kRtShift |
2248 code << 6;
2252 void Assembler::tlt(Register rs, Register rt, uint16_t code) {
2253 DCHECK(is_uint10(code));
2255 SPECIAL | TLT | rs.code() << kRsShift | rt.code() << kRtShift | code << 6;
2259 void Assembler::tltu(Register rs, Register rt, uint16_t code) {
2260 DCHECK(is_uint10(code));
2261 Instr instr = SPECIAL | TLTU | rs.code() << kRsShift | rt.code() << kRtShift |
2262 code << 6;
2266 void Assembler::teq(Register rs, Register rt, uint16_t code) {
2267 DCHECK(is_uint10(code));
2269 SPECIAL | TEQ | rs.code() << kRsShift | rt.code() << kRtShift | code << 6;
2273 void Assembler::tne(Register rs, Register rt, uint16_t code) {
2274 DCHECK(is_uint10(code));
2276 SPECIAL | TNE | rs.code() << kRsShift | rt.code() << kRtShift | code << 6;
2369 PREF | (rs.rm().code() << kRsShift) | (hint << kRtShift) | (rs.offset_);
2875 Instr instr = COP1 | fmt | ft.code() << kFtShift | fs.code() << kFsShift |
2876 fd.code() << kFdShift | (0 << 5) | cond;
2893 Instr instr = COP1 | BC1EQZ | ft.code() << kFtShift | (offset & kImm16Mask);
2901 Instr instr = COP1 | BC1NEZ | ft.code() << kFtShift | (offset & kImm16Mask);
2912 Instr instr = COP1 | fmt | ft.code() << 16 | fs.code() << kFsShift | cc << 8 |
3110 (rs.code() << kWsShift) | (wd.code() << kWdShift) | \
3403 Instr instr = MSA | MOVE_V | (ws.code() << kWsShift) |
3404 (wd.code() << kWdShift) | MSA_ELM_MINOR;
3411 Instr instr = MSA | CTCMSA | (rs.code() << kWsShift) |
3412 (cd.code() << kWdShift) | MSA_ELM_MINOR;
3419 Instr instr = MSA | CFCMSA | (cs.code() << kWsShift) |
3420 (rd.code() << kWdShift) | MSA_ELM_MINOR;
3752 // Must use 2 instructions to insure patchable code => use lui and jic
3773 // Must use 2 instructions to insure patchable code => just use lui and ori.