Lines Matching refs:Instr
262 const Instr kPopInstruction = ADDIU | (sp.code() << kRsShift) |
266 const Instr kPushInstruction = ADDIU | (sp.code() << kRsShift) |
270 const Instr kPushRegPattern = SW | (sp.code() << kRsShift) | (0 & kImm16Mask);
272 const Instr kPopRegPattern = LW | (sp.code() << kRsShift) | (0 & kImm16Mask);
274 const Instr kLwRegFpOffsetPattern =
277 const Instr kSwRegFpOffsetPattern =
280 const Instr kLwRegFpNegOffsetPattern =
283 const Instr kSwRegFpNegOffsetPattern =
286 const Instr kRtMask = kRtFieldMask;
287 const Instr kLwSwInstrTypeMask = 0xFFE00000;
288 const Instr kLwSwInstrArgumentMask = ~kLwSwInstrTypeMask;
289 const Instr kLwSwOffsetMask = kImm16Mask;
368 Register Assembler::GetRtReg(Instr instr) {
372 Register Assembler::GetRsReg(Instr instr) {
376 Register Assembler::GetRdReg(Instr instr) {
380 uint32_t Assembler::GetRt(Instr instr) {
384 uint32_t Assembler::GetRtField(Instr instr) { return instr & kRtFieldMask; }
386 uint32_t Assembler::GetRs(Instr instr) {
390 uint32_t Assembler::GetRsField(Instr instr) { return instr & kRsFieldMask; }
392 uint32_t Assembler::GetRd(Instr instr) {
396 uint32_t Assembler::GetRdField(Instr instr) { return instr & kRdFieldMask; }
398 uint32_t Assembler::GetSa(Instr instr) {
402 uint32_t Assembler::GetSaField(Instr instr) { return instr & kSaFieldMask; }
404 uint32_t Assembler::GetOpcodeField(Instr instr) { return instr & kOpcodeMask; }
406 uint32_t Assembler::GetFunction(Instr instr) {
410 uint32_t Assembler::GetFunctionField(Instr instr) {
414 uint32_t Assembler::GetImmediate16(Instr instr) { return instr & kImm16Mask; }
416 uint32_t Assembler::GetLabelConst(Instr instr) { return instr & ~kImm16Mask; }
418 bool Assembler::IsPop(Instr instr) {
422 bool Assembler::IsPush(Instr instr) {
426 bool Assembler::IsSwRegFpOffset(Instr instr) {
430 bool Assembler::IsLwRegFpOffset(Instr instr) {
434 bool Assembler::IsSwRegFpNegOffset(Instr instr) {
439 bool Assembler::IsLwRegFpNegOffset(Instr instr) {
463 bool Assembler::IsMsaBranch(Instr instr) {
487 bool Assembler::IsBranch(Instr instr) {
511 bool Assembler::IsBc(Instr instr) {
517 bool Assembler::IsNal(Instr instr) {
524 bool Assembler::IsBzc(Instr instr) {
531 bool Assembler::IsEmittedConstant(Instr instr) {
536 bool Assembler::IsBeq(Instr instr) { return GetOpcodeField(instr) == BEQ; }
538 bool Assembler::IsBne(Instr instr) { return GetOpcodeField(instr) == BNE; }
540 bool Assembler::IsBeqzc(Instr instr) {
545 bool Assembler::IsBnezc(Instr instr) {
550 bool Assembler::IsBeqc(Instr instr) {
557 bool Assembler::IsBnec(Instr instr) {
564 bool Assembler::IsJicOrJialc(Instr instr) {
570 bool Assembler::IsJump(Instr instr) {
582 bool Assembler::IsJ(Instr instr) {
588 bool Assembler::IsJal(Instr instr) { return GetOpcodeField(instr) == JAL; }
590 bool Assembler::IsJr(Instr instr) {
599 bool Assembler::IsJalr(Instr instr) {
604 bool Assembler::IsLui(Instr instr) {
610 bool Assembler::IsOri(Instr instr) {
616 bool Assembler::IsAddu(Instr instr, Register rd, Register rs, Register rt) {
630 bool Assembler::IsMov(Instr instr, Register rd, Register rs) {
644 bool Assembler::IsNop(Instr instr, unsigned int type) {
666 int32_t Assembler::GetBranchOffset(Instr instr) {
671 bool Assembler::IsLw(Instr instr) {
675 int16_t Assembler::GetLwOffset(Instr instr) {
680 Instr Assembler::SetLwOffset(Instr instr, int16_t offset) {
684 Instr temp_instr = LW | (instr & kRsFieldMask) | (instr & kRtFieldMask) |
690 bool Assembler::IsSw(Instr instr) {
694 Instr Assembler::SetSwOffset(Instr instr, int16_t offset) {
699 bool Assembler::IsAddImmediate(Instr instr) {
703 Instr Assembler::SetAddImmediateOffset(Instr instr, int16_t offset) {
708 bool Assembler::IsAndImmediate(Instr instr) {
712 static Assembler::OffsetSize OffsetSizeInBits(Instr instr) {
723 static inline int32_t AddBranchOffset(int pos, Instr instr) {
740 uint32_t Assembler::CreateTargetAddress(Instr instr_lui, Instr instr_jic) {
782 void Assembler::PatchLuiOriImmediate(int pc, int32_t imm, Instr instr_lui,
783 Address offset_lui, Instr instr_ori,
793 void Assembler::PatchLuiOriImmediate(Address pc, int32_t imm, Instr instr_lui,
794 Address offset_lui, Instr instr_ori,
802 int32_t Assembler::GetLuiOriImmediate(Instr instr_lui, Instr instr_ori) {
812 Instr instr = instr_at(pos);
838 Instr instr_lui = instr_at(pos + 2 * kInstrSize);
839 Instr instr_ori = instr_at(pos + 3 * kInstrSize);
850 Instr instr_lui = instr_at(pos + 0 * kInstrSize);
851 Instr instr_ori = instr_at(pos + 2 * kInstrSize);
859 Instr instr1 = instr_at(pos + 0 * kInstrSize);
860 Instr instr2 = instr_at(pos + 1 * kInstrSize);
882 static inline Instr SetBranchOffset(int32_t pos, int32_t target_pos,
883 Instr instr) {
898 Instr instr = instr_at(pos);
918 Instr instr_lui = instr_at(pos + 2 * kInstrSize);
919 Instr instr_ori = instr_at(pos + 3 * kInstrSize);
928 Instr instr_b = BEQ;
931 Instr instr_j = instr_at(pos + 5 * kInstrSize);
932 Instr instr_branch_delay;
956 Instr instr_lui = instr_at(pos + 0 * kInstrSize);
957 Instr instr_ori = instr_at(pos + 2 * kInstrSize);
966 Instr instr_b = REGIMM | BGEZAL; // Branch and link.
970 Instr instr_a = ADDIU | ra.code() << kRsShift | ra.code() << kRtShift |
982 Instr instr1 = instr_at(pos + 0 * kInstrSize);
983 Instr instr2 = instr_at(pos + 1 * kInstrSize);
1015 Instr instr = instr_at(l.pos());
1045 Instr instr = instr_at(fixup_pos);
1104 int Assembler::BranchOffset(Instr instr) {
1142 Instr instr = opcode | (rs.code() << kRsShift) | (rt.code() << kRtShift) |
1151 Instr instr = opcode | (rs.code() << kRsShift) | (rt.code() << kRtShift) |
1160 Instr instr = opcode | fmt | (ft.code() << kFtShift) |
1169 Instr instr = opcode | (fr.code() << kFrShift) | (ft.code() << kFtShift) |
1178 Instr instr = opcode | fmt | (rt.code() << kRtShift) |
1186 Instr instr =
1197 Instr instr = opcode | (rs.code() << kRsShift) | (rt.code() << kRtShift) |
1207 Instr instr = opcode | (base.code() << kBaseShift) | (rt.code() << kRtShift) |
1217 Instr instr = opcode | (rs.code() << kRsShift) | SF | (j & kImm16Mask);
1225 Instr instr = opcode | (rs.code() << kRsShift) | (ft.code() << kFtShift) |
1233 Instr instr = opcode | (rs.code() << kRsShift) | (offset21 & kImm21Mask);
1240 Instr instr = opcode | (rs.code() << kRsShift) | (offset21 & kImm21Mask);
1247 Instr instr = opcode | (offset26 & kImm26Mask);
1254 Instr instr = opcode | address;
1264 Instr instr = MSA | operation | ((imm8 & kImm8Mask) << kWtShift) |
1278 Instr instr = MSA | operation | df | ((imm5 & kImm5Mask) << kWtShift) |
1287 Instr instr = MSA | operation | df | (m << kWtShift) |
1296 Instr instr = MSA | operation | df | ((imm10 & kImm10Mask) << kWsShift) |
1306 Instr instr = MSA | operation | df | (t.code() << kWtShift) |
1316 Instr instr = MSA | operation | df | (n << kWtShift) |
1327 Instr instr = MSA | operation | (df << 21) | (wt.code() << kWtShift) |
1336 Instr instr = MSA | operation | (wt.code() << kWtShift) |
1346 Instr instr = MSA | operation | ((s10 & kImm10Mask) << kWtShift) |
1355 Instr instr = MSA | MSA_2R_FORMAT | operation | df | (ws.code() << kWsShift) |
1364 Instr instr = MSA | MSA_2RF_FORMAT | operation | df |
1375 Instr instr =
1919 Instr instr = SPECIAL | (1 << kRsShift) | (rt.code() << kRtShift) |
1928 Instr instr = SPECIAL | (rs.code() << kRsShift) | (rt.code() << kRtShift) |
1937 Instr instr = SPECIAL | rs.code() << kRsShift | rt.code() << kRtShift |
2224 Instr break_instr = SPECIAL | BREAK | (code << 6);
2240 Instr instr =
2247 Instr instr = SPECIAL | TGEU | rs.code() << kRsShift | rt.code() << kRtShift |
2254 Instr instr =
2261 Instr instr = SPECIAL | TLTU | rs.code() << kRsShift | rt.code() << kRtShift |
2268 Instr instr =
2275 Instr instr =
2281 Instr sync_instr = SPECIAL | SYNC;
2368 Instr instr =
2875 Instr instr = COP1 | fmt | ft.code() << kFtShift | fs.code() << kFsShift |
2893 Instr instr = COP1 | BC1EQZ | ft.code() << kFtShift | (offset & kImm16Mask);
2901 Instr instr = COP1 | BC1NEZ | ft.code() << kFtShift | (offset & kImm16Mask);
2912 Instr instr = COP1 | fmt | ft.code() << 16 | fs.code() << kFsShift | cc << 8 |
2937 Instr instr = COP1 | BC1 | cc << 18 | 0 << 16 | (offset & kImm16Mask);
2945 Instr instr = COP1 | BC1 | cc << 18 | 1 << 16 | (offset & kImm16Mask);
3109 Instr instr = MSA | MSA_2R_FORMAT | FILL | MSA_2R_DF_##format | \
3403 Instr instr = MSA | MOVE_V | (ws.code() << kWsShift) |
3411 Instr instr = MSA | CTCMSA | (rs.code() << kWsShift) |
3419 Instr instr = MSA | CFCMSA | (cs.code() << kWsShift) |
3457 Instr instr = instr_at(pc);
3469 Instr instr1 = instr_at(pc + 0 * kInstrSize);
3470 Instr instr2 = instr_at(pc + 1 * kInstrSize);
3506 Instr instr = instr_at(pc);
3510 Instr instr1 = instr_at(pc + 0 * kInstrSize);
3511 Instr instr2 = instr_at(pc + 1 * kInstrSize);
3512 Instr instr3 = instr_at(pc + 2 * kInstrSize);
3706 Instr instr1 = instr_at(pc);
3707 Instr instr2 = instr_at(pc + kInstrSize);
3708 Instr instr3 = instr_at(pc + 2 * kInstrSize);
3742 Instr instr1 = instr_at(pc);
3743 Instr instr2 = instr_at(pc + kInstrSize);
3765 Instr instr3 = instr_at(pc + 2 * kInstrSize);