Lines Matching defs:lui
188 // specially coded on MIPS means that it is a lui/ori instruction, and that is
754 // Use just lui and jic instructions. Insert lower part of the target address in
758 // in jic register with lui instruction.
2042 lui(scratch, (loaded_offset >> kLuiShift) & kImm16Mask);
2169 void Assembler::lui(Register rd, int32_t j) {
2175 // This instruction uses same opcode as 'lui'. The difference in encoding is
2176 // 'lui' has zero reg. for rs field.
3709 // Interpret 2 instructions generated by li (lui/ori) or optimized pairs
3710 // lui/jic, aui/jic or lui/jialc.
3735 // On Mips, a target address is stored in a lui/ori instruction pair, each
3738 // On r6, target address is stored in a lui/jic pair, and both instr have to be
3752 // Must use 2 instructions to insure patchable code => use lui and jic
3773 // Must use 2 instructions to insure patchable code => just use lui and ori.
3774 // lui rt, upper-16.
3798 // or when changing imm32 that lui/ori pair loads.
3804 lui(ts, (imm32 & kHiMask) >> kLuiShift);
3823 // or when changing imm32 that lui/ori pair loads.
3824 lui(t, (imm32 & kHiMask) >> kLuiShift);