Lines Matching refs:rj
343 void TurboAssembler::Add_w(Register rd, Register rj, const Operand& rk) {
345 add_w(rd, rj, rk.rm());
348 addi_w(rd, rj, static_cast<int32_t>(rk.immediate()));
353 DCHECK(rj != scratch);
355 add_w(rd, rj, scratch);
360 void TurboAssembler::Add_d(Register rd, Register rj, const Operand& rk) {
362 add_d(rd, rj, rk.rm());
365 addi_d(rd, rj, static_cast<int32_t>(rk.immediate()));
370 DCHECK(rj != scratch);
372 add_d(rd, rj, scratch);
377 void TurboAssembler::Sub_w(Register rd, Register rj, const Operand& rk) {
379 sub_w(rd, rj, rk.rm());
384 addi_w(rd, rj, static_cast<int32_t>(-rk.immediate()));
388 DCHECK(rj != scratch);
392 add_w(rd, rj, scratch);
396 sub_w(rd, rj, scratch);
402 void TurboAssembler::Sub_d(Register rd, Register rj, const Operand& rk) {
404 sub_d(rd, rj, rk.rm());
407 addi_d(rd, rj, static_cast<int32_t>(-rk.immediate()));
409 DCHECK(rj != t7);
418 add_d(rd, rj, scratch);
424 sub_d(rd, rj, scratch);
429 void TurboAssembler::Mul_w(Register rd, Register rj, const Operand& rk) {
431 mul_w(rd, rj, rk.rm());
436 DCHECK(rj != scratch);
438 mul_w(rd, rj, scratch);
442 void TurboAssembler::Mulh_w(Register rd, Register rj, const Operand& rk) {
444 mulh_w(rd, rj, rk.rm());
449 DCHECK(rj != scratch);
451 mulh_w(rd, rj, scratch);
455 void TurboAssembler::Mulh_wu(Register rd, Register rj, const Operand& rk) {
457 mulh_wu(rd, rj, rk.rm());
462 DCHECK(rj != scratch);
464 mulh_wu(rd, rj, scratch);
468 void TurboAssembler::Mul_d(Register rd, Register rj, const Operand& rk) {
470 mul_d(rd, rj, rk.rm());
475 DCHECK(rj != scratch);
477 mul_d(rd, rj, scratch);
481 void TurboAssembler::Mulh_d(Register rd, Register rj, const Operand& rk) {
483 mulh_d(rd, rj, rk.rm());
488 DCHECK(rj != scratch);
490 mulh_d(rd, rj, scratch);
494 void TurboAssembler::Div_w(Register rd, Register rj, const Operand& rk) {
496 div_w(rd, rj, rk.rm());
501 DCHECK(rj != scratch);
503 div_w(rd, rj, scratch);
507 void TurboAssembler::Mod_w(Register rd, Register rj, const Operand& rk) {
509 mod_w(rd, rj, rk.rm());
514 DCHECK(rj != scratch);
516 mod_w(rd, rj, scratch);
520 void TurboAssembler::Mod_wu(Register rd, Register rj, const Operand& rk) {
522 mod_wu(rd, rj, rk.rm());
527 DCHECK(rj != scratch);
529 mod_wu(rd, rj, scratch);
533 void TurboAssembler::Div_d(Register rd, Register rj, const Operand& rk) {
535 div_d(rd, rj, rk.rm());
540 DCHECK(rj != scratch);
542 div_d(rd, rj, scratch);
546 void TurboAssembler::Div_wu(Register rd, Register rj, const Operand& rk) {
548 div_wu(rd, rj, rk.rm());
553 DCHECK(rj != scratch);
555 div_wu(rd, rj, scratch);
559 void TurboAssembler::Div_du(Register rd, Register rj, const Operand& rk) {
561 div_du(rd, rj, rk.rm());
566 DCHECK(rj != scratch);
568 div_du(rd, rj, scratch);
572 void TurboAssembler::Mod_d(Register rd, Register rj, const Operand& rk) {
574 mod_d(rd, rj, rk.rm());
579 DCHECK(rj != scratch);
581 mod_d(rd, rj, scratch);
585 void TurboAssembler::Mod_du(Register rd, Register rj, const Operand& rk) {
587 mod_du(rd, rj, rk.rm());
592 DCHECK(rj != scratch);
594 mod_du(rd, rj, scratch);
598 void TurboAssembler::And(Register rd, Register rj, const Operand& rk) {
600 and_(rd, rj, rk.rm());
603 andi(rd, rj, static_cast<int32_t>(rk.immediate()));
608 DCHECK(rj != scratch);
610 and_(rd, rj, scratch);
615 void TurboAssembler::Or(Register rd, Register rj, const Operand& rk) {
617 or_(rd, rj, rk.rm());
620 ori(rd, rj, static_cast<int32_t>(rk.immediate()));
625 DCHECK(rj != scratch);
627 or_(rd, rj, scratch);
632 void TurboAssembler::Xor(Register rd, Register rj, const Operand& rk) {
634 xor_(rd, rj, rk.rm());
637 xori(rd, rj, static_cast<int32_t>(rk.immediate()));
642 DCHECK(rj != scratch);
644 xor_(rd, rj, scratch);
649 void TurboAssembler::Nor(Register rd, Register rj, const Operand& rk) {
651 nor(rd, rj, rk.rm());
656 DCHECK(rj != scratch);
658 nor(rd, rj, scratch);
662 void TurboAssembler::Andn(Register rd, Register rj, const Operand& rk) {
664 andn(rd, rj, rk.rm());
669 DCHECK(rj != scratch);
671 andn(rd, rj, scratch);
675 void TurboAssembler::Orn(Register rd, Register rj, const Operand& rk) {
677 orn(rd, rj, rk.rm());
682 DCHECK(rj != scratch);
684 orn(rd, rj, scratch);
688 void TurboAssembler::Neg(Register rj, const Operand& rk) {
690 sub_d(rj, zero_reg, rk.rm());
693 void TurboAssembler::Slt(Register rd, Register rj, const Operand& rk) {
695 slt(rd, rj, rk.rm());
698 slti(rd, rj, static_cast<int32_t>(rk.immediate()));
704 DCHECK(rj != scratch);
706 slt(rd, rj, scratch);
711 void TurboAssembler::Sltu(Register rd, Register rj, const Operand& rk) {
713 sltu(rd, rj, rk.rm());
716 sltui(rd, rj, static_cast<int32_t>(rk.immediate()));
722 DCHECK(rj != scratch);
724 sltu(rd, rj, scratch);
729 void TurboAssembler::Sle(Register rd, Register rj, const Operand& rk) {
731 slt(rd, rk.rm(), rj);
737 DCHECK(rj != scratch);
739 slt(rd, scratch, rj);
744 void TurboAssembler::Sleu(Register rd, Register rj, const Operand& rk) {
746 sltu(rd, rk.rm(), rj);
752 DCHECK(rj != scratch);
754 sltu(rd, scratch, rj);
759 void TurboAssembler::Sge(Register rd, Register rj, const Operand& rk) {
760 Slt(rd, rj, rk);
764 void TurboAssembler::Sgeu(Register rd, Register rj, const Operand& rk) {
765 Sltu(rd, rj, rk);
769 void TurboAssembler::Sgt(Register rd, Register rj, const Operand& rk) {
771 slt(rd, rk.rm(), rj);
777 DCHECK(rj != scratch);
779 slt(rd, scratch, rj);
783 void TurboAssembler::Sgtu(Register rd, Register rj, const Operand& rk) {
785 sltu(rd, rk.rm(), rj);
791 DCHECK(rj != scratch);
793 sltu(rd, scratch, rj);
797 void TurboAssembler::Rotr_w(Register rd, Register rj, const Operand& rk) {
799 rotr_w(rd, rj, rk.rm());
805 rotri_w(rd, rj, ror_value);
809 void TurboAssembler::Rotr_d(Register rd, Register rj, const Operand& rk) {
811 rotr_d(rd, rj, rk.rm());
815 rotri_d(rd, rj, dror_value);
819 void TurboAssembler::Alsl_w(Register rd, Register rj, Register rk, uint8_t sa,
823 alsl_w(rd, rj, rk, sa);
827 slli_w(tmp, rj, sa);
832 void TurboAssembler::Alsl_d(Register rd, Register rj, Register rk, uint8_t sa,
836 alsl_d(rd, rj, rk, sa);
840 slli_d(tmp, rj, sa);
874 void TurboAssembler::Ld_b(Register rd, const MemOperand& rj) {
875 MemOperand source = rj;
884 void TurboAssembler::Ld_bu(Register rd, const MemOperand& rj) {
885 MemOperand source = rj;
894 void TurboAssembler::St_b(Register rd, const MemOperand& rj) {
895 MemOperand source = rj;
904 void TurboAssembler::Ld_h(Register rd, const MemOperand& rj) {
905 MemOperand source = rj;
914 void TurboAssembler::Ld_hu(Register rd, const MemOperand& rj) {
915 MemOperand source = rj;
924 void TurboAssembler::St_h(Register rd, const MemOperand& rj) {
925 MemOperand source = rj;
934 void TurboAssembler::Ld_w(Register rd, const MemOperand& rj) {
935 MemOperand source = rj;
951 void TurboAssembler::Ld_wu(Register rd, const MemOperand& rj) {
952 MemOperand source = rj;
961 void TurboAssembler::St_w(Register rd, const MemOperand& rj) {
962 MemOperand source = rj;
978 void TurboAssembler::Ld_d(Register rd, const MemOperand& rj) {
979 MemOperand source = rj;
995 void TurboAssembler::St_d(Register rd, const MemOperand& rj) {
996 MemOperand source = rj;
1052 void TurboAssembler::Ll_w(Register rd, const MemOperand& rj) {
1053 DCHECK(!rj.hasIndexReg());
1054 bool is_one_instruction = is_int14(rj.offset());
1056 ll_w(rd, rj.base(), rj.offset());
1060 li(scratch, rj.offset());
1061 add_d(scratch, scratch, rj.base());
1066 void TurboAssembler::Ll_d(Register rd, const MemOperand& rj) {
1067 DCHECK(!rj.hasIndexReg());
1068 bool is_one_instruction = is_int14(rj.offset());
1070 ll_d(rd, rj.base(), rj.offset());
1074 li(scratch, rj.offset());
1075 add_d(scratch, scratch, rj.base());
1080 void TurboAssembler::Sc_w(Register rd, const MemOperand& rj) {
1081 DCHECK(!rj.hasIndexReg());
1082 bool is_one_instruction = is_int14(rj.offset());
1084 sc_w(rd, rj.base(), rj.offset());
1088 li(scratch, rj.offset());
1089 add_d(scratch, scratch, rj.base());
1094 void TurboAssembler::Sc_d(Register rd, const MemOperand& rj) {
1095 DCHECK(!rj.hasIndexReg());
1096 bool is_one_instruction = is_int14(rj.offset());
1098 sc_d(rd, rj.base(), rj.offset());
1102 li(scratch, rj.offset());
1103 add_d(scratch, scratch, rj.base());
1396 void TurboAssembler::Bstrpick_w(Register rk, Register rj, uint16_t msbw,
1401 bstrpick_w(rk, rj, msbw, lsbw);
1404 void TurboAssembler::Bstrpick_d(Register rk, Register rj, uint16_t msbw,
1409 bstrpick_d(rk, rj, msbw, lsbw);
1422 void TurboAssembler::Ffint_d_uw(FPURegister fd, Register rj) {
1424 DCHECK(rj != t7);
1426 Bstrpick_d(t7, rj, 31, 0);
1437 void TurboAssembler::Ffint_d_ul(FPURegister fd, Register rj) {
1439 DCHECK(rj != t7);
1443 Branch(&msb_clear, ge, rj, Operand(zero_reg));
1446 andi(t7, rj, 1);
1447 srli_d(rj, rj, 1);
1448 or_(t7, t7, rj);
1456 movgr2fr_d(fd, rj);
1468 void TurboAssembler::Ffint_s_uw(FPURegister fd, Register rj) {
1470 DCHECK(rj != t7);
1472 bstrpick_d(t7, rj, 31, 0);
1483 void TurboAssembler::Ffint_s_ul(FPURegister fd, Register rj) {
1485 DCHECK(rj != t7);
1489 Branch(&positive, ge, rj, Operand(zero_reg));
1492 andi(t7, rj, 1);
1493 srli_d(rj, rj, 1);
1494 or_(t7, t7, rj);
1502 movgr2fr_d(fd, rj);
1604 // and add 2^31 to rj.
1904 void TurboAssembler::Movz(Register rd, Register rj, Register rk) {
1907 masknez(scratch, rj, rk);
1912 void TurboAssembler::Movn(Register rd, Register rj, Register rk) {
1915 maskeqz(scratch, rj, rk);
1920 void TurboAssembler::LoadZeroOnCondition(Register rd, Register rj,
1928 if (rj == zero_reg) {
1935 LoadZeroIfConditionZero(rd, rj);
1937 Sub_d(t7, rj, rk);
1942 if (rj == zero_reg) {
1949 LoadZeroIfConditionNotZero(rd, rj);
1951 Sub_d(t7, rj, rk);
1958 Sgt(t7, rj, rk);
1962 Sge(t7, rj, rk);
1964 // rj >= rk
1967 Slt(t7, rj, rk);
1969 // rj < rk
1972 Sle(t7, rj, rk);
1974 // rj <= rk
1979 Sgtu(t7, rj, rk);
1981 // rj > rk
1985 Sgeu(t7, rj, rk);
1987 // rj >= rk
1990 Sltu(t7, rj, rk);
1992 // rj < rk
1995 Sleu(t7, rj, rk);
1997 // rj <= rk
2028 void TurboAssembler::Clz_w(Register rd, Register rj) { clz_w(rd, rj); }
2030 void TurboAssembler::Clz_d(Register rd, Register rj) { clz_d(rd, rj); }
2032 void TurboAssembler::Ctz_w(Register rd, Register rj) { ctz_w(rd, rj); }
2034 void TurboAssembler::Ctz_d(Register rd, Register rj) { ctz_d(rd, rj); }
2037 void TurboAssembler::Popcnt_w(Register rd, Register rj) {
2063 srli_w(scratch, rj, 1);
2066 Sub_w(scratch, rj, scratch);
2081 void TurboAssembler::Popcnt_d(Register rd, Register rj) {
2093 srli_d(scratch, rj, 1);
2096 Sub_d(scratch, rj, scratch);
2198 #define BRANCH_ARGS_CHECK(cond, rj, rk) \
2199 DCHECK((cond == cc_always && rj == zero_reg && rk.rm() == zero_reg) || \
2200 (cond != cc_always && (rj != zero_reg || rk.rm() != zero_reg)))
2211 void TurboAssembler::Branch(Label* L, Condition cond, Register rj,
2214 BRANCH_ARGS_CHECK(cond, rj, rk);
2215 if (!BranchShortOrFallback(L, cond, rj, rk, need_link)) {
2219 BranchShort(&skip, neg_cond, rj, rk, need_link);
2231 BranchShort(&skip, neg_cond, rj, rk, need_link);
2238 BranchShort(L, cond, rj, rk, need_link);
2243 void TurboAssembler::Branch(Label* L, Condition cond, Register rj,
2248 Branch(L, cond, rj, Operand(scratch));
2269 Register rj, const Operand& rk,
2274 DCHECK_NE(rj, zero_reg);
2293 if (rk.is_reg() && rj.code() == rk.rm().code()) {
2299 beq(rj, rj, offset);
2304 beqz(rj, offset);
2311 beq(rj, sc, offset);
2315 if (rk.is_reg() && rj.code() == rk.rm().code()) {
2321 bne(rj, rj, offset);
2326 bnez(rj, offset);
2333 bne(rj, sc, offset);
2339 // rj > rk
2340 if (rk.is_reg() && rj.code() == rk.rm().code()) {
2346 blt(zero_reg, rj, offset);
2351 DCHECK(rj != sc);
2353 blt(sc, rj, offset);
2357 // rj >= rk
2358 if (rk.is_reg() && rj.code() == rk.rm().code()) {
2367 bge(rj, zero_reg, offset);
2372 DCHECK(rj != sc);
2374 bge(rj, sc, offset);
2378 // rj < rk
2379 if (rk.is_reg() && rj.code() == rk.rm().code()) {
2385 blt(rj, zero_reg, offset);
2390 DCHECK(rj != sc);
2392 blt(rj, sc, offset);
2396 // rj <= rk
2397 if (rk.is_reg() && rj.code() == rk.rm().code()) {
2406 bge(zero_reg, rj, offset);
2411 DCHECK(rj != sc);
2413 bge(sc, rj, offset);
2419 // rj > rk
2420 if (rk.is_reg() && rj.code() == rk.rm().code()) {
2426 bnez(rj, offset);
2431 DCHECK(rj != sc);
2433 bltu(sc, rj, offset);
2437 // rj >= rk
2438 if (rk.is_reg() && rj.code() == rk.rm().code()) {
2452 DCHECK(rj != sc);
2454 bgeu(rj, sc, offset);
2458 // rj < rk
2459 if (rk.is_reg() && rj.code() == rk.rm().code()) {
2467 DCHECK(rj != sc);
2469 bltu(rj, sc, offset);
2473 // rj <= rk
2474 if (rk.is_reg() && rj.code() == rk.rm().code()) {
2482 beqz(rj, L);
2487 DCHECK(rj != sc);
2489 bgeu(sc, rj, offset);
2499 void TurboAssembler::BranchShort(Label* L, Condition cond, Register rj,
2501 BRANCH_ARGS_CHECK(cond, rj, rk);
2502 bool result = BranchShortOrFallback(L, cond, rj, rk, need_link);
2530 void TurboAssembler::Jump(Register target, Condition cond, Register rj,
2536 BRANCH_ARGS_CHECK(cond, rj, rk);
2538 Branch(&skip, NegateCondition(cond), rj, rk);
2545 Condition cond, Register rj, const Operand& rk) {
2548 Branch(&skip, NegateCondition(cond), rj, rk);
2559 Register rj, const Operand& rk) {
2561 Jump(static_cast<intptr_t>(target), rmode, cond, rj, rk);
2565 Condition cond, Register rj, const Operand& rk) {
2571 BranchShort(&skip, NegateCondition(cond), rj, rk);
2590 Jump(t7, cc_always, rj, rk);
2598 Jump(t7, cc_always, rj, rk);
2604 Jump(static_cast<intptr_t>(code.address()), rmode, cc_always, rj, rk);
2614 void TurboAssembler::Call(Register target, Condition cond, Register rj,
2620 BRANCH_ARGS_CHECK(cond, rj, rk);
2622 Branch(&skip, NegateCondition(cond), rj, rk);
2644 Register rj, const Operand& rk) {
2648 BranchShort(&skip, NegateCondition(cond), rj, rk);
2658 Call(t7, cc_always, rj, rk);
2664 Condition cond, Register rj, const Operand& rk) {
2668 BranchShort(&skip, NegateCondition(cond), rj, rk);
2691 Call(t7, cond, rj, rk);
2699 Call(t7, cond, rj, rk);
2707 Call(code.address(), rmode, cc_always, rj, rk);
2827 void TurboAssembler::Ret(Condition cond, Register rj, const Operand& rk) {
2828 Jump(ra, cond, rj, rk);
3387 void TurboAssembler::Check(Condition cc, AbortReason reason, Register rj,
3390 Branch(&L, cc, rj, rk);