Lines Matching defs:code
2 // Use of this source code is governed by a BSD-style license that can be
80 return kNumbers[reg.code()];
101 // and that is always the case inside code objects.
197 // metadata table builders (safepoint, handler, constant pool, code
209 // Set up code descriptor.
288 // Labels refer to positions in the (to be) generated code.
292 // generated code. pos() is the position the label refers to.
294 // Linked labels refer to unknown positions in the code
301 // code is conv to an 18-bit value addressing bytes, hence the -4 value.
366 OR | zero_reg.code() << kRkShift | rj.code() << kRjShift | rd.code();
372 Instr instr1 = PCADDI | (si20 & 0xfffff) << kRjShift | rd.code();
381 ANDI | ((type & kImm12Mask) << kRkShift) | (zero_reg.code() << kRjShift);
682 (rj.code() << kRjShift) | ((si21 & 0x1fffff) >> 16);
708 (rj.code() << kRjShift) | rd.code();
715 Instr instr = opcode | cond << kCondShift | (fk.code() << kFkShift) |
716 (fj.code() << kFjShift) | cd;
723 Instr instr = opcode | ca << kCondShift | (fk.code() << kFkShift) |
724 (fj.code() << kFjShift) | rd.code();
732 instr = opcode | (rj.code() << kRjShift) | rd.code();
737 Instr instr = opcode | (fj.code() << kFjShift) | fd.code();
744 Instr instr = opcode | (rj.code() << kRjShift) | fd.code();
751 Instr instr = opcode | (fj.code() << kFjShift) | rd.code();
757 Instr instr = opcode | (rj.code() << kRjShift) | fd.code();
763 Instr instr = opcode | (fj.code() << kFjShift) | rd.code();
769 Instr instr = opcode | (fj.code() << kFjShift) | cd;
775 Instr instr = opcode | cj << kFjShift | fd.code();
781 Instr instr = opcode | (rj.code() << kRjShift) | cd;
787 Instr instr = opcode | cj << kFjShift | rd.code();
794 opcode | (rk.code() << kRkShift) | (rj.code() << kRjShift) | rd.code();
801 opcode | (fk.code() << kFkShift) | (fj.code() << kFjShift) | fd.code();
807 Instr instr = opcode | (fa.code() << kFaShift) | (fk.code() << kFkShift) |
808 (fj.code() << kFjShift) | fd.code();
815 opcode | (rk.code() << kRkShift) | (rj.code() << kRjShift) | fd.code();
822 Instr instr = opcode | (bit3 & 0x7) << kSaShift | (rk.code() << kRkShift) |
823 (rj.code() << kRjShift) | rd.code();
831 (rj.code() << kRjShift) | rd.code();
837 Instr instr = opcode | (bit20 & 0xfffff) << kRjShift | rd.code();
859 Instr instr = opcode | imm << kRkShift | (rj.code() << kRjShift) | rd.code();
867 (rj.code() << kRjShift) | fd.code();
1660 void Assembler::break_(uint32_t code, bool break_as_stop) {
1662 (break_as_stop && code <= kMaxStopCode && code > kMaxWatchpointCode) ||
1663 (!break_as_stop && (code > kMaxStopCode || code <= kMaxWatchpointCode)));
1664 GenImm(BREAK, code);
1667 void Assembler::stop(uint32_t code) {
1668 DCHECK_GT(code, kMaxWatchpointCode);
1669 DCHECK_LE(code, kMaxStopCode);
1673 break_(code, true);
2144 // None of our relocation types are pc relative pointing outside the code
2145 // buffer nor pc absolute pointing inside the code buffer, so there is no need
2312 // in code on LOONG64 because only 48-bits of address is effectively used.
2340 // Must use 3 instructions to insure patchable code.