Lines Matching refs:rn
418 void add(const Register& rd, const Register& rn, const Operand& operand);
421 void adds(const Register& rd, const Register& rn, const Operand& operand);
424 void cmn(const Register& rn, const Operand& operand);
427 void sub(const Register& rd, const Register& rn, const Operand& operand);
430 void subs(const Register& rd, const Register& rn, const Operand& operand);
433 void cmp(const Register& rn, const Operand& operand);
442 void adc(const Register& rd, const Register& rn, const Operand& operand);
445 void adcs(const Register& rd, const Register& rn, const Operand& operand);
448 void sbc(const Register& rd, const Register& rn, const Operand& operand);
451 void sbcs(const Register& rd, const Register& rn, const Operand& operand);
461 void and_(const Register& rd, const Register& rn, const Operand& operand);
464 void ands(const Register& rd, const Register& rn, const Operand& operand);
467 void tst(const Register& rn, const Operand& operand);
470 void bic(const Register& rd, const Register& rn, const Operand& operand);
473 void bics(const Register& rd, const Register& rn, const Operand& operand);
562 void orr(const Register& rd, const Register& rn, const Operand& operand);
571 void orn(const Register& rd, const Register& rn, const Operand& operand);
574 void eor(const Register& rd, const Register& rn, const Operand& operand);
577 void eon(const Register& rd, const Register& rn, const Operand& operand);
580 void lslv(const Register& rd, const Register& rn, const Register& rm);
583 void lsrv(const Register& rd, const Register& rn, const Register& rm);
586 void asrv(const Register& rd, const Register& rn, const Register& rm);
589 void rorv(const Register& rd, const Register& rn, const Register& rm);
593 void bfm(const Register& rd, const Register& rn, int immr, int imms);
596 void sbfm(const Register& rd, const Register& rn, int immr, int imms);
599 void ubfm(const Register& rd, const Register& rn, int immr, int imms);
603 void bfi(const Register& rd, const Register& rn, int lsb, int width) {
605 DCHECK(lsb + width <= rn.SizeInBits());
606 bfm(rd, rn, (rd.SizeInBits() - lsb) & (rd.SizeInBits() - 1), width - 1);
610 void bfxil(const Register& rd, const Register& rn, int lsb, int width) {
612 DCHECK(lsb + width <= rn.SizeInBits());
613 bfm(rd, rn, lsb, lsb + width - 1);
618 void asr(const Register& rd, const Register& rn, int shift) {
620 sbfm(rd, rn, shift, rd.SizeInBits() - 1);
624 void sbfiz(const Register& rd, const Register& rn, int lsb, int width) {
626 DCHECK(lsb + width <= rn.SizeInBits());
627 sbfm(rd, rn, (rd.SizeInBits() - lsb) & (rd.SizeInBits() - 1), width - 1);
631 void sbfx(const Register& rd, const Register& rn, int lsb, int width) {
633 DCHECK(lsb + width <= rn.SizeInBits());
634 sbfm(rd, rn, lsb, lsb + width - 1);
638 void sxtb(const Register& rd, const Register& rn) { sbfm(rd, rn, 0, 7); }
641 void sxth(const Register& rd, const Register& rn) { sbfm(rd, rn, 0, 15); }
644 void sxtw(const Register& rd, const Register& rn) { sbfm(rd, rn, 0, 31); }
648 void lsl(const Register& rd, const Register& rn, int shift) {
651 ubfm(rd, rn, (reg_size - shift) % reg_size, reg_size - shift - 1);
655 void lsr(const Register& rd, const Register& rn, int shift) {
657 ubfm(rd, rn, shift, rd.SizeInBits() - 1);
661 void ubfiz(const Register& rd, const Register& rn, int lsb, int width) {
663 DCHECK(lsb + width <= rn.SizeInBits());
664 ubfm(rd, rn, (rd.SizeInBits() - lsb) & (rd.SizeInBits() - 1), width - 1);
668 void ubfx(const Register& rd, const Register& rn, int lsb, int width) {
670 DCHECK(lsb + width <= rn.SizeInBits());
671 ubfm(rd, rn, lsb, lsb + width - 1);
675 void uxtb(const Register& rd, const Register& rn) { ubfm(rd, rn, 0, 7); }
678 void uxth(const Register& rd, const Register& rn) { ubfm(rd, rn, 0, 15); }
681 void uxtw(const Register& rd, const Register& rn) { ubfm(rd, rn, 0, 31); }
684 void extr(const Register& rd, const Register& rn, const Register& rm,
687 // Conditional select: rd = cond ? rn : rm.
688 void csel(const Register& rd, const Register& rn, const Register& rm,
691 // Conditional select increment: rd = cond ? rn : rm + 1.
692 void csinc(const Register& rd, const Register& rn, const Register& rm,
695 // Conditional select inversion: rd = cond ? rn : ~rm.
696 void csinv(const Register& rd, const Register& rn, const Register& rm,
699 // Conditional select negation: rd = cond ? rn : -rm.
700 void csneg(const Register& rd, const Register& rn, const Register& rm,
709 // Conditional increment: rd = cond ? rn + 1 : rn.
710 void cinc(const Register& rd, const Register& rn, Condition cond);
712 // Conditional invert: rd = cond ? ~rn : rn.
713 void cinv(const Register& rd, const Register& rn, Condition cond);
715 // Conditional negate: rd = cond ? -rn : rn.
716 void cneg(const Register& rd, const Register& rn, Condition cond);
725 void ccmn(const Register& rn, const Operand& operand, StatusFlags nzcv,
729 void ccmp(const Register& rn, const Operand& operand, StatusFlags nzcv,
734 void mul(const Register& rd, const Register& rn, const Register& rm);
737 void madd(const Register& rd, const Register& rn, const Register& rm,
741 void mneg(const Register& rd, const Register& rn, const Register& rm);
744 void msub(const Register& rd, const Register& rn, const Register& rm,
748 void smull(const Register& rd, const Register& rn, const Register& rm);
751 void smulh(const Register& rd, const Register& rn, const Register& rm);
754 void smaddl(const Register& rd, const Register& rn, const Register& rm,
758 void umaddl(const Register& rd, const Register& rn, const Register& rm,
762 void smsubl(const Register& rd, const Register& rn, const Register& rm,
766 void umsubl(const Register& rd, const Register& rn, const Register& rm,
770 void sdiv(const Register& rd, const Register& rn, const Register& rm);
773 void udiv(const Register& rd, const Register& rn, const Register& rm);
776 void rbit(const Register& rd, const Register& rn);
777 void rev16(const Register& rd, const Register& rn);
778 void rev32(const Register& rd, const Register& rn);
779 void rev(const Register& rd, const Register& rn);
780 void clz(const Register& rd, const Register& rn);
781 void cls(const Register& rd, const Register& rn);
847 void ldar(const Register& rt, const Register& rn);
850 void ldaxr(const Register& rt, const Register& rn);
853 void stlr(const Register& rt, const Register& rn);
856 void stlxr(const Register& rs, const Register& rt, const Register& rn);
859 void ldarb(const Register& rt, const Register& rn);
862 void ldaxrb(const Register& rt, const Register& rn);
865 void stlrb(const Register& rt, const Register& rn);
868 void stlxrb(const Register& rs, const Register& rt, const Register& rn);
871 void ldarh(const Register& rt, const Register& rn);
874 void ldaxrh(const Register& rt, const Register& rn);
877 void stlrh(const Register& rt, const Register& rn);
880 void stlxrh(const Register& rs, const Register& rt, const Register& rn);
915 void mov(const Register& rd, const Register& rn);
1512 void fmov(const VRegister& fd, const Register& rn);
1518 void fmov(const VRegister& vd, int index, const Register& rn);
1790 void scvtf(const VRegister& fd, const Register& rn, int fbits = 0);
1793 void ucvtf(const VRegister& fd, const Register& rn, int fbits = 0);
1809 void dup(const VRegister& vd, const Register& rn);
1812 void ins(const VRegister& vd, int vd_index, const Register& rn);
1815 void mov(const VRegister& vd, int vd_index, const Register& rn);
2112 static Instr Rn(CPURegister rn) {
2113 DCHECK_NE(rn.code(), kSPRegInternalCode);
2114 return rn.code() << Rn_offset;
2155 static Instr RnSP(Register rn) {
2156 DCHECK(!rn.IsZero());
2157 return (rn.code() & kRegCodeMask) << Rn_offset;
2477 void Logical(const Register& rd, const Register& rn, const Operand& operand,
2479 void LogicalImmediate(const Register& rd, const Register& rn, unsigned n,
2482 void ConditionalCompare(const Register& rn, const Operand& operand,
2487 void AddSubWithCarry(const Register& rd, const Register& rn,
2493 void EmitShift(const Register& rd, const Register& rn, Shift shift,
2495 void EmitExtendShift(const Register& rd, const Register& rn, Extend extend,
2498 void AddSub(const Register& rd, const Register& rn, const Operand& operand,
2527 void DataProcShiftedRegister(const Register& rd, const Register& rn,
2529 void DataProcExtendedRegister(const Register& rd, const Register& rn,
2532 void ConditionalSelect(const Register& rd, const Register& rn,
2535 void DataProcessing1Source(const Register& rd, const Register& rn,
2537 void DataProcessing3Source(const Register& rd, const Register& rn,