Lines Matching refs:Instr
1702 void NEONFPConvertToInt(const Register& rd, const VRegister& vn, Instr op);
1703 void NEONFPConvertToInt(const VRegister& vd, const VRegister& vn, Instr op);
2040 void dci(Instr raw_inst) { Emit(raw_inst); }
2062 void debug(const char* message, uint32_t code, Instr params = BREAK);
2107 static Instr Rd(CPURegister rd) {
2112 static Instr Rn(CPURegister rn) {
2117 static Instr Rm(CPURegister rm) {
2122 static Instr RmNot31(CPURegister rm) {
2128 static Instr Ra(CPURegister ra) {
2133 static Instr Rt(CPURegister rt) {
2138 static Instr Rt2(CPURegister rt2) {
2143 static Instr Rs(CPURegister rs) {
2150 static Instr RdSP(Register rd) {
2155 static Instr RnSP(Register rn) {
2161 inline static Instr Flags(FlagsUpdate S);
2162 inline static Instr Cond(Condition cond);
2165 inline static Instr ImmPCRelAddress(int imm21);
2168 inline static Instr ImmUncondBranch(int imm26);
2169 inline static Instr ImmCondBranch(int imm19);
2170 inline static Instr ImmCmpBranch(int imm19);
2171 inline static Instr ImmTestBranch(int imm14);
2172 inline static Instr ImmTestBranchBit(unsigned bit_pos);
2175 inline static Instr SF(Register rd);
2176 inline static Instr ImmAddSub(int imm);
2177 inline static Instr ImmS(unsigned imms, unsigned reg_size);
2178 inline static Instr ImmR(unsigned immr, unsigned reg_size);
2179 inline static Instr ImmSetBits(unsigned imms, unsigned reg_size);
2180 inline static Instr ImmRotate(unsigned immr, unsigned reg_size);
2181 inline static Instr ImmLLiteral(int imm19);
2182 inline static Instr BitN(unsigned bitn, unsigned reg_size);
2183 inline static Instr ShiftDP(Shift shift);
2184 inline static Instr ImmDPShift(unsigned amount);
2185 inline static Instr ExtendMode(Extend extend);
2186 inline static Instr ImmExtendShift(unsigned left_shift);
2187 inline static Instr ImmCondCmp(unsigned imm);
2188 inline static Instr Nzcv(StatusFlags nzcv);
2195 inline static Instr ImmLSUnsigned(int imm12);
2196 inline static Instr ImmLS(int imm9);
2197 inline static Instr ImmLSPair(int imm7, unsigned size);
2198 inline static Instr ImmShiftLS(unsigned shift_amount);
2199 inline static Instr ImmException(int imm16);
2200 inline static Instr ImmSystemRegister(int imm15);
2201 inline static Instr ImmHint(int imm7);
2202 inline static Instr ImmBarrierDomain(int imm2);
2203 inline static Instr ImmBarrierType(int imm2);
2207 static Instr VFormat(VRegister vd) {
2238 static Instr FPFormat(VRegister vd) {
2257 static Instr LSVFormat(VRegister vd) {
2289 static Instr SFormat(VRegister vd) {
2305 static Instr ImmNEONHLM(int index, int num_bits) {
2326 static Instr ImmNEONExt(int imm4) {
2331 static Instr ImmNEON5(Instr format, int index) {
2338 static Instr ImmNEON4(Instr format, int index) {
2345 static Instr ImmNEONabcdefgh(int imm8) {
2347 Instr instr;
2353 static Instr NEONCmode(int cmode) {
2358 static Instr NEONModImmOp(int op) {
2368 inline static Instr ImmMoveWide(int imm);
2369 inline static Instr ShiftMoveWide(int shift);
2372 static Instr ImmFP(double imm);
2373 static Instr ImmNEONFP(double imm);
2374 inline static Instr FPScale(unsigned scale);
2377 inline static Instr FPType(VRegister fd);
2473 Instr op);
2528 const Operand& operand, FlagsUpdate S, Instr op);
2531 Instr op);
2561 const VRegister& vm, Instr op);
2572 void NEONFP2RegMisc(const VRegister& vd, const VRegister& vn, Instr op);
2599 Instr LoadStoreStructAddrModeField(const MemOperand& addr);
2616 void Emit(Instr instruction) {