Lines Matching refs:vt3
2355 const VRegister& vt3, const MemOperand& src) {
2357 USE(vt3);
2358 DCHECK(AreSameFormat(vt, vt2, vt3));
2359 DCHECK(AreConsecutive(vt, vt2, vt3));
2364 const VRegister& vt3, const VRegister& vt4,
2367 USE(vt3);
2369 DCHECK(AreSameFormat(vt, vt2, vt3, vt4));
2370 DCHECK(AreConsecutive(vt, vt2, vt3, vt4));
2399 const VRegister& vt3, const MemOperand& src) {
2401 USE(vt3);
2402 DCHECK(AreSameFormat(vt, vt2, vt3));
2403 DCHECK(AreConsecutive(vt, vt2, vt3));
2408 const VRegister& vt3, int lane, const MemOperand& src) {
2410 USE(vt3);
2411 DCHECK(AreSameFormat(vt, vt2, vt3));
2412 DCHECK(AreConsecutive(vt, vt2, vt3));
2417 const VRegister& vt3, const MemOperand& src) {
2419 USE(vt3);
2420 DCHECK(AreSameFormat(vt, vt2, vt3));
2421 DCHECK(AreConsecutive(vt, vt2, vt3));
2426 const VRegister& vt3, const VRegister& vt4,
2429 USE(vt3);
2431 DCHECK(AreSameFormat(vt, vt2, vt3, vt4));
2432 DCHECK(AreConsecutive(vt, vt2, vt3, vt4));
2437 const VRegister& vt3, const VRegister& vt4, int lane,
2440 USE(vt3);
2442 DCHECK(AreSameFormat(vt, vt2, vt3, vt4));
2443 DCHECK(AreConsecutive(vt, vt2, vt3, vt4));
2448 const VRegister& vt3, const VRegister& vt4,
2451 USE(vt3);
2453 DCHECK(AreSameFormat(vt, vt2, vt3, vt4));
2454 DCHECK(AreConsecutive(vt, vt2, vt3, vt4));
2471 const VRegister& vt3, const MemOperand& src) {
2473 USE(vt3);
2474 DCHECK(AreSameFormat(vt, vt2, vt3));
2475 DCHECK(AreConsecutive(vt, vt2, vt3));
2480 const VRegister& vt3, const VRegister& vt4,
2483 USE(vt3);
2485 DCHECK(AreSameFormat(vt, vt2, vt3, vt4));
2486 DCHECK(AreConsecutive(vt, vt2, vt3, vt4));
2507 const VRegister& vt3, const MemOperand& dst) {
2509 USE(vt3);
2510 DCHECK(AreSameFormat(vt, vt2, vt3));
2511 DCHECK(AreConsecutive(vt, vt2, vt3));
2516 const VRegister& vt3, int lane, const MemOperand& dst) {
2518 USE(vt3);
2519 DCHECK(AreSameFormat(vt, vt2, vt3));
2520 DCHECK(AreConsecutive(vt, vt2, vt3));
2525 const VRegister& vt3, const VRegister& vt4,
2528 USE(vt3);
2530 DCHECK(AreSameFormat(vt, vt2, vt3, vt4));
2531 DCHECK(AreConsecutive(vt, vt2, vt3, vt4));
2536 const VRegister& vt3, const VRegister& vt4, int lane,
2539 USE(vt3);
2541 DCHECK(AreSameFormat(vt, vt2, vt3, vt4));
2542 DCHECK(AreConsecutive(vt, vt2, vt3, vt4));