Lines Matching refs:fbits
2816 void Assembler::scvtf(const VRegister& vd, const VRegister& vn, int fbits) {
2817 DCHECK_GE(fbits, 0);
2818 if (fbits == 0) {
2822 NEONShiftRightImmediate(vd, vn, fbits, NEON_SCVTF_imm);
2826 void Assembler::ucvtf(const VRegister& vd, const VRegister& vn, int fbits) {
2827 DCHECK_GE(fbits, 0);
2828 if (fbits == 0) {
2832 NEONShiftRightImmediate(vd, vn, fbits, NEON_UCVTF_imm);
2836 void Assembler::scvtf(const VRegister& vd, const Register& rn, int fbits) {
2837 DCHECK_GE(fbits, 0);
2838 if (fbits == 0) {
2841 Emit(SF(rn) | FPType(vd) | SCVTF_fixed | FPScale(64 - fbits) | Rn(rn) |
2846 void Assembler::ucvtf(const VRegister& fd, const Register& rn, int fbits) {
2847 DCHECK_GE(fbits, 0);
2848 if (fbits == 0) {
2851 Emit(SF(rn) | FPType(fd) | UCVTF_fixed | FPScale(64 - fbits) | Rn(rn) |
2967 void Assembler::fcvtzs(const Register& rd, const VRegister& vn, int fbits) {
2969 DCHECK((fbits >= 0) && (fbits <= rd.SizeInBits()));
2970 if (fbits == 0) {
2973 Emit(SF(rd) | FPType(vn) | FCVTZS_fixed | FPScale(64 - fbits) | Rn(vn) |
2978 void Assembler::fcvtzs(const VRegister& vd, const VRegister& vn, int fbits) {
2979 DCHECK_GE(fbits, 0);
2980 if (fbits == 0) {
2984 NEONShiftRightImmediate(vd, vn, fbits, NEON_FCVTZS_imm);
2988 void Assembler::fcvtzu(const Register& rd, const VRegister& vn, int fbits) {
2990 DCHECK((fbits >= 0) && (fbits <= rd.SizeInBits()));
2991 if (fbits == 0) {
2994 Emit(SF(rd) | FPType(vn) | FCVTZU_fixed | FPScale(64 - fbits) | Rn(vn) |
2999 void Assembler::fcvtzu(const VRegister& vd, const VRegister& vn, int fbits) {
3000 DCHECK_GE(fbits, 0);
3001 if (fbits == 0) {
3005 NEONShiftRightImmediate(vd, vn, fbits, NEON_FCVTZU_imm);