Lines Matching refs:src2
98 void Push(Register src1, Register src2, Condition cond = al) {
99 if (src1.code() > src2.code()) {
100 stm(db_w, sp, {src1, src2}, cond);
103 str(src2, MemOperand(sp, 4, NegPreIndex), cond);
108 void Push(Register src1, Register src2, Register src3, Condition cond = al) {
109 if (src1.code() > src2.code()) {
110 if (src2.code() > src3.code()) {
111 stm(db_w, sp, {src1, src2, src3}, cond);
113 stm(db_w, sp, {src1, src2}, cond);
118 Push(src2, src3, cond);
123 void Push(Register src1, Register src2, Register src3, Register src4,
125 if (src1.code() > src2.code()) {
126 if (src2.code() > src3.code()) {
128 stm(db_w, sp, {src1, src2, src3, src4}, cond);
130 stm(db_w, sp, {src1, src2, src3}, cond);
134 stm(db_w, sp, {src1, src2}, cond);
139 Push(src2, src3, src4, cond);
144 void Push(Register src1, Register src2, Register src3, Register src4,
146 if (src1.code() > src2.code()) {
147 if (src2.code() > src3.code()) {
150 stm(db_w, sp, {src1, src2, src3, src4, src5}, cond);
152 stm(db_w, sp, {src1, src2, src3, src4}, cond);
156 stm(db_w, sp, {src1, src2, src3}, cond);
160 stm(db_w, sp, {src1, src2}, cond);
165 Push(src2, src3, src4, src5, cond);
178 void Pop(Register src1, Register src2, Condition cond = al) {
179 DCHECK(src1 != src2);
180 if (src1.code() > src2.code()) {
181 ldm(ia_w, sp, {src1, src2}, cond);
183 ldr(src2, MemOperand(sp, 4, PostIndex), cond);
189 void Pop(Register src1, Register src2, Register src3, Condition cond = al) {
190 DCHECK(!AreAliased(src1, src2, src3));
191 if (src1.code() > src2.code()) {
192 if (src2.code() > src3.code()) {
193 ldm(ia_w, sp, {src1, src2, src3}, cond);
196 ldm(ia_w, sp, {src1, src2}, cond);
199 Pop(src2, src3, cond);
205 void Pop(Register src1, Register src2, Register src3, Register src4,
207 DCHECK(!AreAliased(src1, src2, src3, src4));
208 if (src1.code() > src2.code()) {
209 if (src2.code() > src3.code()) {
211 ldm(ia_w, sp, {src1, src2, src3, src4}, cond);
214 ldm(ia_w, sp, {src1, src2, src3}, cond);
218 ldm(ia_w, sp, {src1, src2}, cond);
221 Pop(src2, src3, src4, cond);
244 void MovToFloatParameters(DwVfpRegister src1, DwVfpRegister src2);
338 void VFPCompareAndSetFlags(const SwVfpRegister src1, const SwVfpRegister src2,
340 void VFPCompareAndSetFlags(const SwVfpRegister src1, const float src2,
344 void VFPCompareAndSetFlags(const DwVfpRegister src1, const DwVfpRegister src2,
346 void VFPCompareAndSetFlags(const DwVfpRegister src1, const double src2,
574 void I64x2Eq(QwNeonRegister dst, QwNeonRegister src1, QwNeonRegister src2);
575 void I64x2Ne(QwNeonRegister dst, QwNeonRegister src1, QwNeonRegister src2);
576 void I64x2GtS(QwNeonRegister dst, QwNeonRegister src1, QwNeonRegister src2);
577 void I64x2GeS(QwNeonRegister dst, QwNeonRegister src1, QwNeonRegister src2);
587 const SwVfpRegister src2,
590 void VFPCompareAndLoadFlags(const SwVfpRegister src1, const float src2,
596 const DwVfpRegister src2,
599 void VFPCompareAndLoadFlags(const DwVfpRegister src1, const double src2,
627 void Mls(Register dst, Register src1, Register src2, Register srcA,
629 void And(Register dst, Register src1, const Operand& src2,