Lines Matching refs:dst
175 void Pop(Register dst) { pop(dst); }
259 void MovFromFloatParameter(DwVfpRegister dst);
260 void MovFromFloatResult(DwVfpRegister dst);
350 void VFPCanonicalizeNaN(const DwVfpRegister dst, const DwVfpRegister src,
357 void VmovHigh(Register dst, DwVfpRegister src);
358 void VmovHigh(DwVfpRegister dst, Register src);
359 void VmovLow(Register dst, DwVfpRegister src);
360 void VmovLow(DwVfpRegister dst, Register src);
456 void ExtractLane(Register dst, QwNeonRegister src, NeonDataType dt, int lane);
457 void ExtractLane(Register dst, DwVfpRegister src, NeonDataType dt, int lane);
458 void ExtractLane(SwVfpRegister dst, QwNeonRegister src, int lane);
459 void ExtractLane(DwVfpRegister dst, QwNeonRegister src, int lane);
460 void ReplaceLane(QwNeonRegister dst, QwNeonRegister src, Register src_lane,
462 void ReplaceLane(QwNeonRegister dst, QwNeonRegister src,
464 void ReplaceLane(QwNeonRegister dst, QwNeonRegister src,
470 NeonMemOperand dst);
473 void Move(Register dst, Smi smi);
474 void Move(Register dst, Handle<HeapObject> value);
475 void Move(Register dst, ExternalReference reference);
476 void Move(Register dst, Register src, Condition cond = al);
477 void Move(Register dst, const MemOperand& src) { ldr(dst, src); }
478 void Move(Register dst, const Operand& src, SBit sbit = LeaveCC,
480 if (!src.IsRegister() || src.rm() != dst || sbit != LeaveCC) {
481 mov(dst, src, sbit, cond);
487 void Move(SwVfpRegister dst, SwVfpRegister src, Condition cond = al);
488 void Move(DwVfpRegister dst, DwVfpRegister src, Condition cond = al);
489 void Move(QwNeonRegister dst, QwNeonRegister src);
492 void VmovExtended(Register dst, int src_code);
497 void VmovExtended(const MemOperand& dst, int src_code);
507 void Bfc(Register dst, Register src, int lsb, int width, Condition cond = al);
512 void SmiUntag(Register dst, Register src, SBit s = LeaveCC) {
513 mov(dst, Operand::SmiUntag(src), s);
558 void ComputeCodeStartAddress(Register dst);
573 void I64x2BitMask(Register dst, QwNeonRegister src);
574 void I64x2Eq(QwNeonRegister dst, QwNeonRegister src1, QwNeonRegister src2);
575 void I64x2Ne(QwNeonRegister dst, QwNeonRegister src1, QwNeonRegister src2);
576 void I64x2GtS(QwNeonRegister dst, QwNeonRegister src1, QwNeonRegister src2);
577 void I64x2GeS(QwNeonRegister dst, QwNeonRegister src1, QwNeonRegister src2);
578 void I64x2AllTrue(Register dst, QwNeonRegister src);
579 void I64x2Abs(QwNeonRegister dst, QwNeonRegister src);
580 void F64x2ConvertLowI32x4S(QwNeonRegister dst, QwNeonRegister src);
581 void F64x2ConvertLowI32x4U(QwNeonRegister dst, QwNeonRegister src);
582 void F64x2PromoteLowF32x4(QwNeonRegister dst, QwNeonRegister src);
627 void Mls(Register dst, Register src1, Register src2, Register srcA,
629 void And(Register dst, Register src1, const Operand& src2,
631 void Ubfx(Register dst, Register src, int lsb, int width,
633 void Sbfx(Register dst, Register src, int lsb, int width,
670 void LoadGlobalProxy(Register dst);
672 void LoadNativeContextSlot(Register dst, int index);
832 void SmiTag(Register dst, Register src, SBit s = LeaveCC);
866 void DecodeField(Register dst, Register src) {
867 Ubfx(dst, src, Field::kShift, Field::kSize);