Lines Matching defs:shift
1006 // On Neon we can shift and insert from d-registers.
1168 Register shift) {
1170 DCHECK(!AreAliased(dst_high, shift));
1176 rsb(scratch, shift, Operand(32), SetCC);
1178 // If shift >= 32
1179 and_(scratch, shift, Operand(0x1F));
1184 // If shift < 32
1185 lsl(dst_high, src_high, Operand(shift));
1187 lsl(dst_low, src_low, Operand(shift));
1193 uint32_t shift) {
1194 DCHECK_GE(63, shift);
1197 if (shift == 0) {
1200 } else if (shift == 32) {
1203 } else if (shift >= 32) {
1204 shift &= 0x1F;
1205 lsl(dst_high, src_low, Operand(shift));
1208 lsl(dst_high, src_high, Operand(shift));
1209 orr(dst_high, dst_high, Operand(src_low, LSR, 32 - shift));
1210 lsl(dst_low, src_low, Operand(shift));
1216 Register shift) {
1218 DCHECK(!AreAliased(dst_low, shift));
1224 rsb(scratch, shift, Operand(32), SetCC);
1226 // If shift >= 32
1227 and_(scratch, shift, Operand(0x1F));
1232 // If shift < 32
1234 lsr(dst_low, src_low, Operand(shift));
1236 lsr(dst_high, src_high, Operand(shift));
1242 uint32_t shift) {
1243 DCHECK_GE(63, shift);
1246 if (shift == 32) {
1249 } else if (shift > 32) {
1250 shift &= 0x1F;
1251 lsr(dst_low, src_high, Operand(shift));
1253 } else if (shift == 0) {
1257 lsr(dst_low, src_low, Operand(shift));
1258 orr(dst_low, dst_low, Operand(src_high, LSL, 32 - shift));
1259 lsr(dst_high, src_high, Operand(shift));
1265 Register shift) {
1267 DCHECK(!AreAliased(dst_low, shift));
1273 rsb(scratch, shift, Operand(32), SetCC);
1275 // If shift >= 32
1276 and_(scratch, shift, Operand(0x1F));
1281 // If shift < 32
1282 lsr(dst_low, src_low, Operand(shift));
1284 asr(dst_high, src_high, Operand(shift));
1290 uint32_t shift) {
1291 DCHECK_GE(63, shift);
1294 if (shift == 32) {
1297 } else if (shift > 32) {
1298 shift &= 0x1F;
1299 asr(dst_low, src_high, Operand(shift));
1301 } else if (shift == 0) {
1305 lsr(dst_low, src_low, Operand(shift));
1306 orr(dst_low, dst_low, Operand(src_high, LSL, 32 - shift));
1307 asr(dst_high, src_high, Operand(shift));