Lines Matching refs:instr
618 Condition Assembler::GetCondition(Instr instr) {
619 return Instruction::ConditionField(instr);
622 bool Assembler::IsLdrRegisterImmediate(Instr instr) {
623 return (instr & (B27 | B26 | B25 | B22 | B20)) == (B26 | B20);
626 bool Assembler::IsVldrDRegisterImmediate(Instr instr) {
627 return (instr & (15 * B24 | 3 * B20 | 15 * B8)) == (13 * B24 | B20 | 11 * B8);
630 int Assembler::GetLdrRegisterImmediateOffset(Instr instr) {
631 DCHECK(IsLdrRegisterImmediate(instr));
632 bool positive = (instr & B23) == B23;
633 int offset = instr & kOff12Mask; // Zero extended offset.
637 int Assembler::GetVldrDRegisterImmediateOffset(Instr instr) {
638 DCHECK(IsVldrDRegisterImmediate(instr));
639 bool positive = (instr & B23) == B23;
640 int offset = instr & kOff8Mask; // Zero extended offset.
645 Instr Assembler::SetLdrRegisterImmediateOffset(Instr instr, int offset) {
646 DCHECK(IsLdrRegisterImmediate(instr));
651 instr = (instr & ~B23) | (positive ? B23 : 0);
653 return (instr & ~kOff12Mask) | offset;
656 Instr Assembler::SetVldrDRegisterImmediateOffset(Instr instr, int offset) {
657 DCHECK(IsVldrDRegisterImmediate(instr));
663 instr = (instr & ~B23) | (positive ? B23 : 0);
665 return (instr & ~kOff8Mask) | (offset >> 2);
668 bool Assembler::IsStrRegisterImmediate(Instr instr) {
669 return (instr & (B27 | B26 | B25 | B22 | B20)) == B26;
672 Instr Assembler::SetStrRegisterImmediateOffset(Instr instr, int offset) {
673 DCHECK(IsStrRegisterImmediate(instr));
678 instr = (instr & ~B23) | (positive ? B23 : 0);
680 return (instr & ~kOff12Mask) | offset;
683 bool Assembler::IsAddRegisterImmediate(Instr instr) {
684 return (instr & (B27 | B26 | B25 | B24 | B23 | B22 | B21)) == (B25 | B23);
687 Instr Assembler::SetAddRegisterImmediateOffset(Instr instr, int offset) {
688 DCHECK(IsAddRegisterImmediate(instr));
692 return (instr & ~kOff12Mask) | offset;
695 Register Assembler::GetRd(Instr instr) {
696 return Register::from_code(Instruction::RdValue(instr));
699 Register Assembler::GetRn(Instr instr) {
700 return Register::from_code(Instruction::RnValue(instr));
703 Register Assembler::GetRm(Instr instr) {
704 return Register::from_code(Instruction::RmValue(instr));
707 bool Assembler::IsPush(Instr instr) {
708 return ((instr & ~kRdMask) == kPushRegPattern);
711 bool Assembler::IsPop(Instr instr) {
712 return ((instr & ~kRdMask) == kPopRegPattern);
715 bool Assembler::IsStrRegFpOffset(Instr instr) {
716 return ((instr & kLdrStrInstrTypeMask) == kStrRegFpOffsetPattern);
719 bool Assembler::IsLdrRegFpOffset(Instr instr) {
720 return ((instr & kLdrStrInstrTypeMask) == kLdrRegFpOffsetPattern);
723 bool Assembler::IsStrRegFpNegOffset(Instr instr) {
724 return ((instr & kLdrStrInstrTypeMask) == kStrRegFpNegOffsetPattern);
727 bool Assembler::IsLdrRegFpNegOffset(Instr instr) {
728 return ((instr & kLdrStrInstrTypeMask) == kLdrRegFpNegOffsetPattern);
731 bool Assembler::IsLdrPcImmediateOffset(Instr instr) {
734 return (instr & kLdrPCImmedMask) == kLdrPCImmedPattern;
737 bool Assembler::IsBOrBlPcImmediateOffset(Instr instr) {
738 return (instr & kBOrBlPCImmedMask) == kBOrBlPCImmedPattern;
741 bool Assembler::IsVldrDPcImmediateOffset(Instr instr) {
744 return (instr & kVldrDPCMask) == kVldrDPCPattern;
747 bool Assembler::IsBlxReg(Instr instr) {
750 return (instr & kBlxRegMask) == kBlxRegPattern;
753 bool Assembler::IsBlxIp(Instr instr) {
756 return instr == kBlxIp;
759 bool Assembler::IsTstImmediate(Instr instr) {
760 return (instr & (B27 | B26 | I | kOpCodeMask | S | kRdMask)) == (I | TST | S);
763 bool Assembler::IsCmpRegister(Instr instr) {
764 return (instr & (B27 | B26 | I | kOpCodeMask | S | kRdMask | B4)) ==
768 bool Assembler::IsCmpImmediate(Instr instr) {
769 return (instr & (B27 | B26 | I | kOpCodeMask | S | kRdMask)) == (I | CMP | S);
772 Register Assembler::GetCmpImmediateRegister(Instr instr) {
773 DCHECK(IsCmpImmediate(instr));
774 return GetRn(instr);
777 int Assembler::GetCmpImmediateRawImmediate(Instr instr) {
778 DCHECK(IsCmpImmediate(instr));
779 return instr & kOff12Mask;
800 Instr instr = instr_at(pos);
801 if (is_uint24(instr)) {
803 return instr;
805 DCHECK_EQ(5 * B25, instr & 7 * B25); // b, bl, or blx imm24
806 int imm26 = ((instr & kImm24Mask) << 8) >> 6;
807 if ((Instruction::ConditionField(instr) == kSpecialCondition) &&
808 ((instr & B24) != 0)) {
816 Instr instr = instr_at(pos);
817 if (is_uint24(instr)) {
892 DCHECK_EQ(5 * B25, instr & 7 * B25); // b, bl, or blx imm24
893 if (Instruction::ConditionField(instr) == kSpecialCondition) {
896 instr = (instr & ~(B24 | kImm24Mask)) | ((imm26 & 2) >> 1) * B24;
899 instr &= ~kImm24Mask;
903 instr_at_put(pos, instr | (imm24 & kImm24Mask));
917 Instr instr = instr_at(l.pos());
918 if ((instr & ~kImm24Mask) == 0) {
921 DCHECK_EQ(instr & 7 * B25, 5 * B25); // b, bl, or blx
922 Condition cond = Instruction::ConditionField(instr);
929 if ((instr & B24) != 0)
1033 Instr* instr) {
1088 if (instr != nullptr) {
1089 if ((*instr & kMovMvnMask) == kMovMvnPattern) {
1091 *instr ^= kMovMvnFlip;
1093 } else if ((*instr & kMovLeaveCCMask) == kMovLeaveCCPattern) {
1096 *instr ^= kMovwLeaveCCFlip;
1097 *instr |= Assembler::EncodeMovwImmediate(imm32);
1103 } else if ((*instr & kCmpCmnMask) == kCmpCmnPattern) {
1105 *instr ^= kCmpCmnFlip;
1109 Instr alu_insn = (*instr & kALUMask);
1113 *instr ^= kAddSubFlip;
1118 *instr ^= kAndBicFlip;
1159 Instr instr) const {
1164 !FitsShifter(immediate(), &dummy1, &dummy2, &instr)) {
1177 if ((instr & ~kCondMask) != 13 * B21) { // mov, S not set
1221 void Assembler::AddrMode1(Instr instr, Register rd, Register rn,
1224 uint32_t opcode = instr & kOpCodeMask;
1225 bool set_flags = (instr & S) != 0;
1238 DCHECK_EQ(instr & ~(kCondMask | kOpCodeMask | S), 0);
1239 if (!AddrMode1TryEncodeOperand(&instr, x)) {
1242 DCHECK(opcode == (instr & kOpCodeMask));
1244 Condition cond = Instruction::ConditionField(instr);
1279 AddrMode1(instr, rd, rn, Operand(scratch));
1285 emit(instr | rn.code() * B16);
1290 emit(instr | rd.code() * B12);
1292 emit(instr | rn.code() * B16 | rd.code() * B12);
1300 bool Assembler::AddrMode1TryEncodeOperand(Instr* instr, const Operand& x) {
1306 !FitsShifter(x.immediate(), &rotate_imm, &immed_8, instr)) {
1310 *instr |= I | rotate_imm * B8 | immed_8;
1312 *instr |= x.shift_imm_ * B7 | x.shift_op_ | x.rm_.code();
1317 *instr |= x.rs_.code() * B8 | x.shift_op_ | B4 | x.rm_.code();
1323 void Assembler::AddrMode2(Instr instr, Register rd, const MemOperand& x) {
1324 DCHECK((instr & ~(kCondMask | B | L)) == B26);
1341 bool is_load = (instr & L) == L;
1346 Instruction::ConditionField(instr));
1347 AddrMode2(instr, rd, MemOperand(x.rn_, scratch, x.am_));
1351 instr |= offset_12;
1357 instr |= B25 | x.shift_imm_ * B7 | x.shift_op_ | x.rm_.code();
1360 emit(instr | am | x.rn_.code() * B16 | rd.code() * B12);
1363 void Assembler::AddrMode3(Instr instr, Register rd, const MemOperand& x) {
1364 DCHECK((instr & ~(kCondMask | L | S6 | H)) == (B4 | B7));
1370 bool is_load = (instr & L) == L;
1387 Instruction::ConditionField(instr));
1388 AddrMode3(instr, rd, MemOperand(x.rn_, scratch, x.am_));
1392 instr |= B | (offset_8 >> 4) * B8 | (offset_8 & 0xF);
1401 Instruction::ConditionField(instr));
1402 AddrMode3(instr, rd, MemOperand(x.rn_, scratch, x.am_));
1407 instr |= x.rm_.code();
1410 emit(instr | am | x.rn_.code() * B16 | rd.code() * B12);
1413 void Assembler::AddrMode4(Instr instr, Register rn, RegList rl) {
1414 DCHECK((instr & ~(kCondMask | P | U | W | L)) == B27);
1417 emit(instr | rn.code() * B16 | rl.bits());
1420 void Assembler::AddrMode5(Instr instr, CRegister crd, const MemOperand& x) {
1423 (instr & ~(kCondMask | kCoprocessorMask | P | U | N | W | L)));
1440 emit(instr | am | x.rn_.code() * B16 | crd.code() * B12 | offset_8);
2066 Instr instr;
2081 instr = I | rotate_imm * B8 | immed_8;
2084 instr = src.rm_.code();
2086 emit(cond | instr | B24 | B21 | fields | 15 * B12);
5111 bool Assembler::IsMovT(Instr instr) {
5112 instr &= ~(((kNumberOfConditions - 1) << 28) | // Mask off conditions
5115 return instr == kMovtPattern;
5118 bool Assembler::IsMovW(Instr instr) {
5119 instr &= ~(((kNumberOfConditions - 1) << 28) | // Mask off conditions
5122 return instr == kMovwPattern;
5139 int Assembler::DecodeShiftImm(Instr instr) {
5140 int rotate = Instruction::RotateValue(instr) * 2;
5141 int immed8 = Instruction::Immed8Value(instr);
5145 Instr Assembler::PatchShiftImm(Instr instr, int immed) {
5151 return (instr & ~kOff12Mask) | (rotate_imm << 8) | immed_8;
5154 bool Assembler::IsNop(Instr instr, int type) {
5157 return instr == (al | 13 * B21 | type * B12 | type);
5160 bool Assembler::IsMovImmed(Instr instr) {
5161 return (instr & kMovImmedMask) == kMovImmedPattern;
5164 bool Assembler::IsOrrImmed(Instr instr) {
5165 return (instr & kOrrImmedMask) == kOrrImmedPattern;
5426 Instr instr = instr_at(entry.position());
5429 DCHECK(!IsVldrDPcImmediateOffset(instr));
5430 DCHECK(!IsMovW(instr));
5431 DCHECK(IsLdrPcImmediateOffset(instr) &&
5432 GetLdrRegisterImmediateOffset(instr) == 0);
5453 SetLdrRegisterImmediateOffset(instr, delta));