Lines Matching defs:operand
1165 // The immediate operand cannot be encoded as a shifter operand, or use of
1185 // No use of constant pool and the immediate operand can be encoded as a
1186 // shifter operand.
1271 // The immediate operand cannot be encoded as a shifter operand, so load
1287 // Emit a move instruction. If the operand is a register-shifted register,
2075 // Immediate operand cannot be encoded, load it first to a scratch
2461 void Assembler::vldr(const DwVfpRegister dst, const MemOperand& operand,
2464 DCHECK(operand.am_ == Offset);
2465 if (operand.rm().is_valid()) {
2468 add(scratch, operand.rn(),
2469 Operand(operand.rm(), operand.shift_op_, operand.shift_imm_));
2472 vldr(dst, operand.rn(), operand.offset(), cond);
2510 void Assembler::vldr(const SwVfpRegister dst, const MemOperand& operand,
2512 DCHECK(operand.am_ == Offset);
2513 if (operand.rm().is_valid()) {
2516 add(scratch, operand.rn(),
2517 Operand(operand.rm(), operand.shift_op_, operand.shift_imm_));
2520 vldr(dst, operand.rn(), operand.offset(), cond);
2560 void Assembler::vstr(const DwVfpRegister src, const MemOperand& operand,
2563 DCHECK(operand.am_ == Offset);
2564 if (operand.rm().is_valid()) {
2567 add(scratch, operand.rn(),
2568 Operand(operand.rm(), operand.shift_op_, operand.shift_imm_));
2571 vstr(src, operand.rn(), operand.offset(), cond);
2609 void Assembler::vstr(const SwVfpRegister src, const MemOperand& operand,
2611 DCHECK(operand.am_ == Offset);
2612 if (operand.rm().is_valid()) {
2615 add(scratch, operand.rn(),
2616 Operand(operand.rm(), operand.shift_op_, operand.shift_imm_));
2619 vstr(src, operand.rn(), operand.offset(), cond);