Lines Matching refs:pc
185 Address pc) const {
186 Instruction* branch = Instruction::At(pc);
228 Address pc, Address target, RelocInfo::Mode mode) {
229 Memory<Address>(pc) = target;
232 bool Assembler::is_constant_pool_load(Address pc) {
233 return IsLdrPcImmediateOffset(Memory<int32_t>(pc));
236 Address Assembler::constant_pool_entry_address(Address pc,
238 DCHECK(Assembler::IsLdrPcImmediateOffset(Memory<int32_t>(pc)));
239 Instr instr = Memory<int32_t>(pc);
240 return pc + GetLdrRegisterImmediateOffset(instr) + Instruction::kPcLoadDelta;
243 Address Assembler::target_address_at(Address pc, Address constant_pool) {
244 if (is_constant_pool_load(pc)) {
246 return Memory<Address>(constant_pool_entry_address(pc, constant_pool));
247 } else if (CpuFeatures::IsSupported(ARMv7) && IsMovW(Memory<int32_t>(pc))) {
249 DCHECK(IsMovW(Memory<int32_t>(pc)) &&
250 IsMovT(Memory<int32_t>(pc + kInstrSize)));
251 Instruction* movw_instr = Instruction::At(pc);
252 Instruction* movt_instr = Instruction::At(pc + kInstrSize);
255 } else if (IsMovImmed(Memory<int32_t>(pc))) {
257 DCHECK(IsMovImmed(Memory<int32_t>(pc)) &&
258 IsOrrImmed(Memory<int32_t>(pc + kInstrSize)) &&
259 IsOrrImmed(Memory<int32_t>(pc + 2 * kInstrSize)) &&
260 IsOrrImmed(Memory<int32_t>(pc + 3 * kInstrSize)));
261 Instr mov_instr = instr_at(pc);
262 Instr orr_instr_1 = instr_at(pc + kInstrSize);
263 Instr orr_instr_2 = instr_at(pc + 2 * kInstrSize);
264 Instr orr_instr_3 = instr_at(pc + 3 * kInstrSize);
270 Instruction* branch = Instruction::At(pc);
272 return pc + delta + Instruction::kPcLoadDelta;
276 void Assembler::set_target_address_at(Address pc, Address constant_pool,
279 if (is_constant_pool_load(pc)) {
281 Memory<Address>(constant_pool_entry_address(pc, constant_pool)) = target;
284 // FlushInstructionCache(pc, sizeof(target));
290 } else if (CpuFeatures::IsSupported(ARMv7) && IsMovW(Memory<int32_t>(pc))) {
293 DCHECK(IsMovW(Memory<int32_t>(pc)));
294 DCHECK(IsMovT(Memory<int32_t>(pc + kInstrSize)));
295 uint32_t* instr_ptr = reinterpret_cast<uint32_t*>(pc);
299 DCHECK(IsMovW(Memory<int32_t>(pc)));
300 DCHECK(IsMovT(Memory<int32_t>(pc + kInstrSize)));
302 FlushInstructionCache(pc, 2 * kInstrSize);
304 } else if (IsMovImmed(Memory<int32_t>(pc))) {
307 DCHECK(IsMovImmed(Memory<int32_t>(pc)) &&
308 IsOrrImmed(Memory<int32_t>(pc + kInstrSize)) &&
309 IsOrrImmed(Memory<int32_t>(pc + 2 * kInstrSize)) &&
310 IsOrrImmed(Memory<int32_t>(pc + 3 * kInstrSize)));
311 uint32_t* instr_ptr = reinterpret_cast<uint32_t*>(pc);
317 DCHECK(IsMovImmed(Memory<int32_t>(pc)) &&
318 IsOrrImmed(Memory<int32_t>(pc + kInstrSize)) &&
319 IsOrrImmed(Memory<int32_t>(pc + 2 * kInstrSize)) &&
320 IsOrrImmed(Memory<int32_t>(pc + 3 * kInstrSize)));
322 FlushInstructionCache(pc, 4 * kInstrSize);
325 intptr_t branch_offset = target - pc - Instruction::kPcLoadDelta;
326 Instruction* branch = Instruction::At(pc);
329 FlushInstructionCache(pc, kInstrSize);