Lines Matching defs:high
326 // Returns 4-bit out of each byte, alternating between the high 4 bits and low bits
484 // constraints and it is advisable to avoid them when high performing code is desired.
488 const uint16x8_t high = vreinterpretq_u16_s8(vzip2q_s8(this->value, vmovq_n_s8(0)));
491 const uint16x8x2_t high_pair{{ high, vmovq_n_u16(0) }};
713 simdutf_really_inline uint64_t in_range(const T low, const T high) const {
715 const simd8<T> mask_high = simd8<T>::splat(high);
724 simdutf_really_inline uint64_t not_in_range(const T low, const T high) const {
726 const simd8<T> mask_high = simd8<T>::splat(high);
1025 simdutf_really_inline uint64_t in_range(const T low, const T high) const {
1027 const simd16<T> mask_high = simd16<T>::splat(high);
1036 simdutf_really_inline uint64_t not_in_range(const T low, const T high) const {
1038 const simd16<T> mask_high = simd16<T>::splat(high);
1058 simdutf_really_inline uint64_t simd16x32<uint16_t>::not_in_range(const uint16_t low, const uint16_t high) const {
1060 const simd16<uint16_t> mask_high = simd16<uint16_t>::splat(high);
1923 // e.g. value.get_bit<7>() gets the high bit
2010 simdutf_really_inline uint64_t in_range(const T low, const T high) const {
2012 const simd8<T> mask_high = simd8<T>::splat(high);
2019 simdutf_really_inline uint64_t not_in_range(const T low, const T high) const {
2021 const simd8<T> mask_high = simd8<T>::splat(high);
2190 // e.g. value.get_bit<7>() gets the high bit
2298 simdutf_really_inline uint64_t in_range(const T low, const T high) const {
2300 const simd16<T> mask_high = simd16<T>::splat(high);
2307 simdutf_really_inline uint64_t not_in_range(const T low, const T high) const {
2309 const simd16<T> mask_high = simd16<T>::splat(static_cast<T>(high+1));
2815 // e.g. value.get_bit<7>() gets the high bit
2956 simdutf_really_inline uint64_t in_range(const T low, const T high) const {
2958 const simd8<T> mask_high = simd8<T>::splat(high);
2967 simdutf_really_inline uint64_t not_in_range(const T low, const T high) const {
2969 const simd8<T> mask_high = simd8<T>::splat(high+1);
3155 // e.g. value.get_bit<7>() gets the high bit
3251 simdutf_really_inline uint64_t in_range(const T low, const T high) const {
3253 const simd16<T> mask_high = simd16<T>::splat(high);
3262 simdutf_really_inline uint64_t not_in_range(const T low, const T high) const {
3264 const simd16<T> mask_high = simd16<T>::splat(static_cast<T>(high+1));
3885 simdutf_really_inline uint64_t in_range(const T low, const T high) const {
3887 const simd8<T> mask_high = simd8<T>::splat(high);
3896 simdutf_really_inline uint64_t not_in_range(const T low, const T high) const {
3898 const simd8<T> mask_high = simd8<T>::splat(high);
12617 uint16x4_t high = vreinterpret_u16_u8(perm_low); // no-op
12620 uint16x4_t mid_high = vsli_n_u16(mid, high, 6);
12908 // - high surrogates: 0b1101'11xx'yyyy'yyyy (0xDC00..0xDFFF)
12910 // Fact: high surrogate has 11th bit set (3rd bit in the higher word)
12916 // H - word-mask for high surrogates: the six highest bits are 0b1101'11
12924 const uint64_t a = L & (H >> 4); // A low surrogate must be followed by high one.
12936 // The 15th word may be either a low or high surrogate. It the next
12937 // iteration we 1) check if the low surrogate is followed by a high
12938 // one, 2) reject sole high surrogate.
12979 // - high surrogates: 0b1101'11xx'yyyy'yyyy (0xDC00..0xDFFF)
12981 // Fact: high surrogate has 11th bit set (3rd bit in the higher word)
12987 // H - word-mask for high surrogates: the six highest bits are 0b1101'11
12995 const uint64_t a = L & (H >> 4); // A low surrogate must be followed by high one.
13007 // The 15th word may be either a low or high surrogate. It the next
13008 // iteration we 1) check if the low surrogate is followed by a high
13009 // one, 2) reject sole high surrogate.
13345 // surrogate high = +0x0000|0xD800
13387 // Because the surrogates need more work, the high surrogate is computed first.
13396 // Top 16 bits contains the high ten bits of the surrogate pair before correction
13398 // 4 byte: 11110aaa bbbbbbcc|cccc0000 00000000 - high 10 bits correct w/o correction
13405 // Blend the low and high surrogates
13418 // surrogate high = +0xD800|0x0000
13425 // If the high bit is 1 (s32 less than zero), this needs a surrogate pair
13544 uint32x4_t high = vshrq_n_u32(perm, 4); // 4 bits
13553 // Insert top 4 bits from high byte with bitwise select
13555 uint32x4_t composed = vbslq_u32(vmovq_n_u32(0x0000F000), high, lowmid);
17918 __m512i clearedbytes = _mm512_andnot_si512(nonasciitags, input); // high two bits cleared where not ASCII
17939 // the elements of Wout excluding the last element if it happens to be a high surrogate:
17980 __m512i clearedbytes = _mm512_andnot_si512(nonasciitags, input); // high two bits cleared where not ASCII
18012 // the elements of Wout excluding the last element if it happens to be a high surrogate:
19659 // H - bitmask for high surrogates
19666 const __mmask32 V = (L ^ (carry | (H << 1))); // A high surrogate must be followed by low one and a low one must be preceded by a high one.
19674 low surrogate high surrogate
19682 /* 2. Shift by one 16-bit word to align low surrogates with high surrogates
19689 /* 3. Align all high surrogates in first and second by shifting to the left by 10 bits
19721 // Only process 31 code units, but keep track if the 31st word is a high surrogate as a carry
20699 // high must be followed by low
20709 // with the high surrogate on the next round.
20870 // high must be followed by low
20876 buf += 31; // advance only by 31 code units so that we start with the high surrogate on the next round.
20891 // high must be followed by low
20919 // high must be followed by low
20925 buf += 31; // advance only by 31 code units so that we start with the high surrogate on the next round.
20940 // high must be followed by low
20959 // high must be followed by low
20967 buf += 31; // advance only by 31 code units so that we start with the high surrogate on the next round.
20982 // high must be followed by low
21013 // high must be followed by low
21021 buf += 31; // advance only by 31 code units so that we start with the high surrogate on the next round.
21036 // high must be followed by low
21648 const __m512i high = _mm512_set1_epi16((uint16_t)0xdfff);
21655 uint64_t not_high_surrogate = static_cast<uint64_t>(_mm512_cmpgt_epu16_mask(utf16, high) | _mm512_cmplt_epu16_mask(utf16, low));
21667 const __m512i high = _mm512_set1_epi16((uint16_t)0xdfff);
21683 uint64_t not_high_surrogate = static_cast<uint64_t>(_mm512_cmpgt_epu16_mask(utf16, high) | _mm512_cmplt_epu16_mask(utf16, low));
22240 0xdc00 .. 0xdfff - high surrogate
22244 - there must not be two consecutive high surrogates (0xdc00 .. 0xdfff)
22245 - there must not be sole low surrogate nor high surrogate
22250 - H = high surrogate (0xdc00 .. 0xdfff)
22256 0 0 1 0 1 0 0 0 - H high surrogate
22306 // - high surrogates: 0b1101'11xx'yyyy'yyyy (0xDC00..0xDFFF)
22308 // Fact: high surrogate has 11th bit set (3rd bit in the higher word)
22314 // H - word-mask for high surrogates: the six highest bits are 0b1101'11
22322 const uint32_t a = L & (H >> 1); // A low surrogate must be followed by high one.
22335 // The 31 word may be either a low or high surrogate. It the next
22336 // iteration we 1) check if the low surrogate is followed by a high
22337 // one, 2) reject sole high surrogate.
22384 // - high surrogates: 0b1101'11xx'yyyy'yyyy (0xDC00..0xDFFF)
22386 // Fact: high surrogate has 11th bit set (3rd bit in the higher word)
22392 // H - word-mask for high surrogates: the six highest bits are 0b1101'11
22400 const uint32_t a = L & (H >> 1); // A low surrogate must be followed by high one.
22413 // The 31 word may be either a low or high surrogate. It the next
22414 // iteration we 1) check if the low surrogate is followed by a high
22415 // one, 2) reject sole high surrogate.
22758 // correct for spurious high bit
22921 // correct for spurious high bit
28717 0xdc00 .. 0xdfff - high surrogate
28721 - there must not be two consecutive high surrogates (0xdc00 .. 0xdfff)
28722 - there must not be sole low surrogate nor high surrogate
28727 - H = high surrogate (0xdc00 .. 0xdfff)
28733 0 0 1 0 1 0 0 0 - H high surrogate
28782 // - high surrogates: 0b1101'11xx'yyyy'yyyy (0xDC00..0xDFFF)
28784 // Fact: high surrogate has 11th bit set (3rd bit in the higher word)
28790 // H - word-mask for high surrogates: the six highest bits are 0b1101'11
28798 const uint16_t a = static_cast<uint16_t>(L & (H >> 1)); // A low surrogate must be followed by high one.
28811 // The 15th word may be either a low or high surrogate. It the next
28812 // iteration we 1) check if the low surrogate is followed by a high
28813 // one, 2) reject sole high surrogate.
28860 // - high surrogates: 0b1101'11xx'yyyy'yyyy (0xDC00..0xDFFF)
28862 // Fact: high surrogate has 11th bit set (3rd bit in the higher word)
28868 // H - word-mask for high surrogates: the six highest bits are 0b1101'11
28876 const uint16_t a = static_cast<uint16_t>(L & (H >> 1)); // A low surrogate must be followed by high one.
28889 // The 15th word may be either a low or high surrogate. It the next
28890 // iteration we 1) check if the low surrogate is followed by a high
28891 // one, 2) reject sole high surrogate.
29235 // correct for spurious high bit
29401 // correct for spurious high bit