Lines Matching refs:pipeline
81 struct panvk_pipeline *pipeline =
83 sizeof(*pipeline), VK_OBJECT_TYPE_PIPELINE);
84 if (!pipeline)
87 pipeline->layout = builder->layout;
88 *out_pipeline = pipeline;
103 panvk_pipeline_static_state(struct panvk_pipeline *pipeline, uint32_t id)
105 return !(pipeline->dynamic_state_mask & (1 << id));
110 struct panvk_pipeline *pipeline)
139 &pipeline->blend.state,
140 panvk_pipeline_static_state(pipeline,
158 struct panvk_pipeline *pipeline)
171 pipeline->binary_bo = bin_bo;
179 memcpy(pipeline->binary_bo->ptr.cpu + builder->stages[i].shader_offset,
188 panvk_pipeline_static_sysval(struct panvk_pipeline *pipeline,
194 return panvk_pipeline_static_state(pipeline, VK_DYNAMIC_STATE_VIEWPORT);
202 struct panvk_pipeline *pipeline)
213 if (pipeline->fs.dynamic_rsd && i == MESA_SHADER_FRAGMENT)
220 bo_size += pan_size(BLEND) * MAX2(pipeline->blend.state.rt_count, 1);
224 panvk_pipeline_static_state(pipeline, VK_DYNAMIC_STATE_VIEWPORT) &&
225 panvk_pipeline_static_state(pipeline, VK_DYNAMIC_STATE_SCISSOR)) {
232 pipeline->state_bo =
234 panfrost_bo_mmap(pipeline->state_bo);
240 struct panvk_pipeline *pipeline,
245 pipeline->sysvals[stage].ids = shader->info.sysvals;
246 pipeline->sysvals[stage].ubo_idx = shader->sysval_ubo;
251 struct panvk_pipeline *pipeline)
258 pipeline->tls_size = MAX2(pipeline->tls_size, shader->info.tls_size);
259 pipeline->wls_size = MAX2(pipeline->wls_size, shader->info.wls_size);
262 pipeline->img_access_mask |= BITFIELD_BIT(i);
270 * pipeline to write point size when we're actually drawing points.
273 pipeline->ia.writes_point_size = points;
280 shader_ptr = pipeline->binary_bo->ptr.gpu +
285 void *rsd = pipeline->state_bo->ptr.cpu + builder->stages[i].rsd_offset;
286 mali_ptr gpu_rsd = pipeline->state_bo->ptr.gpu + builder->stages[i].rsd_offset;
289 pipeline->rsds[i] = gpu_rsd;
292 panvk_pipeline_builder_init_sysvals(builder, pipeline, i);
295 pipeline->cs.local_size = shader->local_size;
298 if (builder->create_info.gfx && !pipeline->fs.dynamic_rsd) {
299 void *rsd = pipeline->state_bo->ptr.cpu + builder->stages[MESA_SHADER_FRAGMENT].rsd_offset;
300 mali_ptr gpu_rsd = pipeline->state_bo->ptr.gpu + builder->stages[MESA_SHADER_FRAGMENT].rsd_offset;
303 panvk_per_arch(emit_base_fs_rsd)(builder->device, pipeline, rsd);
304 for (unsigned rt = 0; rt < pipeline->blend.state.rt_count; rt++) {
305 panvk_per_arch(emit_blend)(builder->device, pipeline, rt, bd);
309 pipeline->rsds[MESA_SHADER_FRAGMENT] = gpu_rsd;
311 panvk_per_arch(emit_base_fs_rsd)(builder->device, pipeline, &pipeline->fs.rsd_template);
312 for (unsigned rt = 0; rt < MAX2(pipeline->blend.state.rt_count, 1); rt++) {
313 panvk_per_arch(emit_blend)(builder->device, pipeline, rt,
314 &pipeline->blend.bd_template[rt]);
318 pipeline->num_ubos = PANVK_NUM_BUILTIN_UBOS +
326 struct panvk_pipeline *pipeline)
332 * pipeline has rasterization disabled.
335 panvk_pipeline_static_state(pipeline, VK_DYNAMIC_STATE_VIEWPORT) &&
336 panvk_pipeline_static_state(pipeline, VK_DYNAMIC_STATE_SCISSOR)) {
337 void *vpd = pipeline->state_bo->ptr.cpu + builder->vpd_offset;
341 pipeline->vpd = pipeline->state_bo->ptr.gpu +
344 if (panvk_pipeline_static_state(pipeline, VK_DYNAMIC_STATE_VIEWPORT))
345 pipeline->viewport = builder->create_info.gfx->pViewportState->pViewports[0];
347 if (panvk_pipeline_static_state(pipeline, VK_DYNAMIC_STATE_SCISSOR))
348 pipeline->scissor = builder->create_info.gfx->pViewportState->pScissors[0];
353 struct panvk_pipeline *pipeline)
365 pipeline->dynamic_state_mask |= 1 << state;
402 struct panvk_pipeline *pipeline)
404 pipeline->ia.primitive_restart =
406 pipeline->ia.topology =
537 struct panvk_pipeline *pipeline)
540 pipeline->blend.state.logicop_enable =
542 pipeline->blend.state.logicop_func =
544 pipeline->blend.state.rt_count = util_last_bit(builder->active_color_attachments);
545 memcpy(pipeline->blend.state.constants,
547 sizeof(pipeline->blend.state.constants));
549 for (unsigned i = 0; i < pipeline->blend.state.rt_count; i++) {
552 struct pan_blend_rt_state *out = &pipeline->blend.state.rts[i];
572 pipeline->blend.reads_dest |= pan_blend_reads_dest(out->equation);
575 panvk_per_arch(blend_needs_lowering)(pdev, &pipeline->blend.state, i) ?
577 pipeline->blend.constant[i].index = ffs(constant_mask) - 1;
581 * used bits are in the MSB. Here we calculate the factor at pipeline
591 pipeline->blend.constant[i].bifrost_factor =
599 struct panvk_pipeline *pipeline)
604 pipeline->ms.rast_samples =
606 pipeline->ms.sample_mask =
609 pipeline->ms.min_samples =
631 struct panvk_pipeline *pipeline)
636 pipeline->zs.z_test = builder->create_info.gfx->pDepthStencilState->depthTestEnable;
647 pipeline->zs.z_write = pipeline->zs.z_test &&
650 pipeline->zs.z_compare_func =
652 pipeline->zs.s_test = builder->create_info.gfx->pDepthStencilState->stencilTestEnable;
653 pipeline->zs.s_front.fail_op =
655 pipeline->zs.s_front.pass_op =
657 pipeline->zs.s_front.z_fail_op =
659 pipeline->zs.s_front.compare_func =
661 pipeline->zs.s_front.compare_mask =
663 pipeline->zs.s_front.write_mask =
665 pipeline->zs.s_front.ref =
667 pipeline->zs.s_back.fail_op =
669 pipeline->zs.s_back.pass_op =
671 pipeline->zs.s_back.z_fail_op =
673 pipeline->zs.s_back.compare_func =
675 pipeline->zs.s_back.compare_mask =
677 pipeline->zs.s_back.write_mask =
679 pipeline->zs.s_back.ref =
685 struct panvk_pipeline *pipeline)
687 pipeline->rast.clamp_depth = builder->create_info.gfx->pRasterizationState->depthClampEnable;
688 pipeline->rast.depth_bias.enable = builder->create_info.gfx->pRasterizationState->depthBiasEnable;
689 pipeline->rast.depth_bias.constant_factor =
691 pipeline->rast.depth_bias.clamp = builder->create_info.gfx->pRasterizationState->depthBiasClamp;
692 pipeline->rast.depth_bias.slope_factor = builder->create_info.gfx->pRasterizationState->depthBiasSlopeFactor;
693 pipeline->rast.front_ccw = builder->create_info.gfx->pRasterizationState->frontFace == VK_FRONT_FACE_COUNTER_CLOCKWISE;
694 pipeline->rast.cull_front_face = builder->create_info.gfx->pRasterizationState->cullMode & VK_CULL_MODE_FRONT_BIT;
695 pipeline->rast.cull_back_face = builder->create_info.gfx->pRasterizationState->cullMode & VK_CULL_MODE_BACK_BIT;
696 pipeline->rast.line_width = builder->create_info.gfx->pRasterizationState->lineWidth;
697 pipeline->rast.enable = !builder->create_info.gfx->pRasterizationState->rasterizerDiscardEnable;
701 panvk_fs_required(struct panvk_pipeline *pipeline)
703 const struct pan_shader_info *info = &pipeline->fs.info;
710 const struct pan_blend_state *blend = &pipeline->blend.state;
730 struct panvk_pipeline *pipeline)
735 pipeline->fs.dynamic_rsd =
736 pipeline->dynamic_state_mask & PANVK_DYNAMIC_FS_RSD_MASK;
737 pipeline->fs.address = pipeline->binary_bo->ptr.gpu +
739 pipeline->fs.info = builder->shaders[MESA_SHADER_FRAGMENT]->info;
740 pipeline->fs.rt_mask = builder->active_color_attachments;
741 pipeline->fs.required = panvk_fs_required(pipeline);
780 struct panvk_pipeline *pipeline)
789 panvk_pipeline_update_varying_slot(&pipeline->varyings, s,
795 panvk_pipeline_update_varying_slot(&pipeline->varyings, s,
803 BITSET_FOREACH_SET(loc, pipeline->varyings.active, VARYING_SLOT_MAX) {
804 if (pipeline->varyings.varying[loc].format == PIPE_FORMAT_NONE)
808 unsigned buf_idx = panvk_varying_buf_index(&pipeline->varyings, buf_id);
809 unsigned varying_sz = panvk_varying_size(&pipeline->varyings, loc);
811 pipeline->varyings.varying[loc].buf = buf_idx;
812 pipeline->varyings.varying[loc].offset =
813 pipeline->varyings.buf[buf_idx].stride;
814 pipeline->varyings.buf[buf_idx].stride += varying_sz;
820 struct panvk_pipeline *pipeline)
822 struct panvk_attribs_info *attribs = &pipeline->attribs;
885 struct panvk_pipeline **pipeline)
887 VkResult result = panvk_pipeline_builder_create_pipeline(builder, pipeline);
893 panvk_pipeline_builder_parse_dynamic(builder, *pipeline);
894 panvk_pipeline_builder_parse_color_blend(builder, *pipeline);
895 panvk_pipeline_builder_compile_shaders(builder, *pipeline);
896 panvk_pipeline_builder_collect_varyings(builder, *pipeline);
897 panvk_pipeline_builder_parse_input_assembly(builder, *pipeline);
898 panvk_pipeline_builder_parse_multisample(builder, *pipeline);
899 panvk_pipeline_builder_parse_zs(builder, *pipeline);
900 panvk_pipeline_builder_parse_rast(builder, *pipeline);
901 panvk_pipeline_builder_parse_vertex_input(builder, *pipeline);
902 panvk_pipeline_builder_upload_shaders(builder, *pipeline);
903 panvk_pipeline_builder_init_fs_state(builder, *pipeline);
904 panvk_pipeline_builder_alloc_static_state_bo(builder, *pipeline);
905 panvk_pipeline_builder_init_shaders(builder, *pipeline);
906 panvk_pipeline_builder_parse_viewport(builder, *pipeline);
908 panvk_pipeline_builder_compile_shaders(builder, *pipeline);
909 panvk_pipeline_builder_upload_shaders(builder, *pipeline);
910 panvk_pipeline_builder_alloc_static_state_bo(builder, *pipeline);
911 panvk_pipeline_builder_init_shaders(builder, *pipeline);
977 struct panvk_pipeline *pipeline;
978 VkResult result = panvk_pipeline_builder_build(&builder, &pipeline);
990 pPipelines[i] = panvk_pipeline_to_handle(pipeline);
1030 struct panvk_pipeline *pipeline;
1031 VkResult result = panvk_pipeline_builder_build(&builder, &pipeline);
1043 pPipelines[i] = panvk_pipeline_to_handle(pipeline);