Lines Matching refs:builder
76 panvk_pipeline_builder_create_pipeline(struct panvk_pipeline_builder *builder,
79 struct panvk_device *dev = builder->device;
82 vk_object_zalloc(&dev->vk, builder->alloc,
87 pipeline->layout = builder->layout;
93 panvk_pipeline_builder_finish(struct panvk_pipeline_builder *builder)
96 if (!builder->shaders[i])
98 panvk_shader_destroy(builder->device, builder->shaders[i], builder->alloc);
109 panvk_pipeline_builder_compile_shaders(struct panvk_pipeline_builder *builder,
116 builder->create_info.gfx ?
117 builder->create_info.gfx->pStages :
118 &builder->create_info.compute->stage;
120 builder->create_info.gfx ? builder->create_info.gfx->stageCount : 1;
136 shader = panvk_per_arch(shader_create)(builder->device, stage, stage_info,
137 builder->layout,
142 builder->alloc);
146 builder->shaders[stage] = shader;
147 builder->shader_total_size = ALIGN_POT(builder->shader_total_size, 128);
148 builder->stages[stage].shader_offset = builder->shader_total_size;
149 builder->shader_total_size +=
157 panvk_pipeline_builder_upload_shaders(struct panvk_pipeline_builder *builder,
163 if (builder->shader_total_size == 0)
167 panfrost_bo_create(&builder->device->physical_device->pdev,
168 builder->shader_total_size, PAN_BO_EXECUTE,
175 const struct panvk_shader *shader = builder->shaders[i];
179 memcpy(pipeline->binary_bo->ptr.cpu + builder->stages[i].shader_offset,
201 panvk_pipeline_builder_alloc_static_state_bo(struct panvk_pipeline_builder *builder,
205 &builder->device->physical_device->pdev;
209 const struct panvk_shader *shader = builder->shaders[i];
217 builder->stages[i].rsd_offset = bo_size;
223 if (builder->create_info.gfx &&
227 builder->vpd_offset = bo_size;
239 panvk_pipeline_builder_init_sysvals(struct panvk_pipeline_builder *builder,
243 const struct panvk_shader *shader = builder->shaders[stage];
250 panvk_pipeline_builder_init_shaders(struct panvk_pipeline_builder *builder,
254 const struct panvk_shader *shader = builder->shaders[i];
266 builder->create_info.gfx->pInputAssemblyState->topology;
279 if (util_dynarray_num_elements(&builder->shaders[i]->binary, uint8_t)) {
281 builder->stages[i].shader_offset;
285 void *rsd = pipeline->state_bo->ptr.cpu + builder->stages[i].rsd_offset;
286 mali_ptr gpu_rsd = pipeline->state_bo->ptr.gpu + builder->stages[i].rsd_offset;
288 panvk_per_arch(emit_non_fs_rsd)(builder->device, &shader->info, shader_ptr, rsd);
292 panvk_pipeline_builder_init_sysvals(builder, pipeline, i);
298 if (builder->create_info.gfx && !pipeline->fs.dynamic_rsd) {
299 void *rsd = pipeline->state_bo->ptr.cpu + builder->stages[MESA_SHADER_FRAGMENT].rsd_offset;
300 mali_ptr gpu_rsd = pipeline->state_bo->ptr.gpu + builder->stages[MESA_SHADER_FRAGMENT].rsd_offset;
303 panvk_per_arch(emit_base_fs_rsd)(builder->device, pipeline, rsd);
305 panvk_per_arch(emit_blend)(builder->device, pipeline, rt, bd);
310 } else if (builder->create_info.gfx) {
311 panvk_per_arch(emit_base_fs_rsd)(builder->device, pipeline, &pipeline->fs.rsd_template);
313 panvk_per_arch(emit_blend)(builder->device, pipeline, rt,
319 builder->layout->num_ubos +
320 builder->layout->num_dyn_ubos;
325 panvk_pipeline_builder_parse_viewport(struct panvk_pipeline_builder *builder,
334 if (!builder->rasterizer_discard &&
337 void *vpd = pipeline->state_bo->ptr.cpu + builder->vpd_offset;
338 panvk_per_arch(emit_viewport)(builder->create_info.gfx->pViewportState->pViewports,
339 builder->create_info.gfx->pViewportState->pScissors,
342 builder->vpd_offset;
345 pipeline->viewport = builder->create_info.gfx->pViewportState->pViewports[0];
348 pipeline->scissor = builder->create_info.gfx->pViewportState->pScissors[0];
352 panvk_pipeline_builder_parse_dynamic(struct panvk_pipeline_builder *builder,
356 builder->create_info.gfx->pDynamicState;
401 panvk_pipeline_builder_parse_input_assembly(struct panvk_pipeline_builder *builder,
405 builder->create_info.gfx->pInputAssemblyState->primitiveRestartEnable;
407 translate_prim_topology(builder->create_info.gfx->pInputAssemblyState->topology);
536 panvk_pipeline_builder_parse_color_blend(struct panvk_pipeline_builder *builder,
539 struct panfrost_device *pdev = &builder->device->physical_device->pdev;
541 builder->create_info.gfx->pColorBlendState->logicOpEnable;
543 translate_logicop(builder->create_info.gfx->pColorBlendState->logicOp);
544 pipeline->blend.state.rt_count = util_last_bit(builder->active_color_attachments);
546 builder->create_info.gfx->pColorBlendState->blendConstants,
551 &builder->create_info.gfx->pColorBlendState->pAttachments[i];
554 out->format = builder->color_attachment_formats[i];
558 out->nr_samples = builder->create_info.gfx->pMultisampleState->rasterizationSamples;
598 panvk_pipeline_builder_parse_multisample(struct panvk_pipeline_builder *builder,
602 MAX2(builder->create_info.gfx->pMultisampleState->rasterizationSamples, 1);
605 builder->create_info.gfx->pMultisampleState->rasterizationSamples;
607 builder->create_info.gfx->pMultisampleState->pSampleMask ?
608 builder->create_info.gfx->pMultisampleState->pSampleMask[0] : UINT16_MAX;
610 MAX2(builder->create_info.gfx->pMultisampleState->minSampleShading * nr_samples, 1);
630 panvk_pipeline_builder_parse_zs(struct panvk_pipeline_builder *builder,
633 if (!builder->use_depth_stencil_attachment)
636 pipeline->zs.z_test = builder->create_info.gfx->pDepthStencilState->depthTestEnable;
648 builder->create_info.gfx->pDepthStencilState->depthWriteEnable;
651 panvk_per_arch(translate_compare_func)(builder->create_info.gfx->pDepthStencilState->depthCompareOp);
652 pipeline->zs.s_test = builder->create_info.gfx->pDepthStencilState->stencilTestEnable;
654 translate_stencil_op(builder->create_info.gfx->pDepthStencilState->front.failOp);
656 translate_stencil_op(builder->create_info.gfx->pDepthStencilState->front.passOp);
658 translate_stencil_op(builder->create_info.gfx->pDepthStencilState->front.depthFailOp);
660 panvk_per_arch(translate_compare_func)(builder->create_info.gfx->pDepthStencilState->front.compareOp);
662 builder->create_info.gfx->pDepthStencilState->front.compareMask;
664 builder->create_info.gfx->pDepthStencilState->front.writeMask;
666 builder->create_info.gfx->pDepthStencilState->front.reference;
668 translate_stencil_op(builder->create_info.gfx->pDepthStencilState->back.failOp);
670 translate_stencil_op(builder->create_info.gfx->pDepthStencilState->back.passOp);
672 translate_stencil_op(builder->create_info.gfx->pDepthStencilState->back.depthFailOp);
674 panvk_per_arch(translate_compare_func)(builder->create_info.gfx->pDepthStencilState->back.compareOp);
676 builder->create_info.gfx->pDepthStencilState->back.compareMask;
678 builder->create_info.gfx->pDepthStencilState->back.writeMask;
680 builder->create_info.gfx->pDepthStencilState->back.reference;
684 panvk_pipeline_builder_parse_rast(struct panvk_pipeline_builder *builder,
687 pipeline->rast.clamp_depth = builder->create_info.gfx->pRasterizationState->depthClampEnable;
688 pipeline->rast.depth_bias.enable = builder->create_info.gfx->pRasterizationState->depthBiasEnable;
690 builder->create_info.gfx->pRasterizationState->depthBiasConstantFactor;
691 pipeline->rast.depth_bias.clamp = builder->create_info.gfx->pRasterizationState->depthBiasClamp;
692 pipeline->rast.depth_bias.slope_factor = builder->create_info.gfx->pRasterizationState->depthBiasSlopeFactor;
693 pipeline->rast.front_ccw = builder->create_info.gfx->pRasterizationState->frontFace == VK_FRONT_FACE_COUNTER_CLOCKWISE;
694 pipeline->rast.cull_front_face = builder->create_info.gfx->pRasterizationState->cullMode & VK_CULL_MODE_FRONT_BIT;
695 pipeline->rast.cull_back_face = builder->create_info.gfx->pRasterizationState->cullMode & VK_CULL_MODE_BACK_BIT;
696 pipeline->rast.line_width = builder->create_info.gfx->pRasterizationState->lineWidth;
697 pipeline->rast.enable = !builder->create_info.gfx->pRasterizationState->rasterizerDiscardEnable;
729 panvk_pipeline_builder_init_fs_state(struct panvk_pipeline_builder *builder,
732 if (!builder->shaders[MESA_SHADER_FRAGMENT])
738 builder->stages[MESA_SHADER_FRAGMENT].shader_offset;
739 pipeline->fs.info = builder->shaders[MESA_SHADER_FRAGMENT]->info;
740 pipeline->fs.rt_mask = builder->active_color_attachments;
779 panvk_pipeline_builder_collect_varyings(struct panvk_pipeline_builder *builder,
783 if (!builder->shaders[s])
786 const struct pan_shader_info *info = &builder->shaders[s]->info;
819 panvk_pipeline_builder_parse_vertex_input(struct panvk_pipeline_builder *builder,
824 builder->create_info.gfx->pVertexInputState;
850 &builder->shaders[MESA_SHADER_VERTEX]->info;
884 panvk_pipeline_builder_build(struct panvk_pipeline_builder *builder,
887 VkResult result = panvk_pipeline_builder_create_pipeline(builder, pipeline);
892 if (builder->create_info.gfx) {
893 panvk_pipeline_builder_parse_dynamic(builder, *pipeline);
894 panvk_pipeline_builder_parse_color_blend(builder, *pipeline);
895 panvk_pipeline_builder_compile_shaders(builder, *pipeline);
896 panvk_pipeline_builder_collect_varyings(builder, *pipeline);
897 panvk_pipeline_builder_parse_input_assembly(builder, *pipeline);
898 panvk_pipeline_builder_parse_multisample(builder, *pipeline);
899 panvk_pipeline_builder_parse_zs(builder, *pipeline);
900 panvk_pipeline_builder_parse_rast(builder, *pipeline);
901 panvk_pipeline_builder_parse_vertex_input(builder, *pipeline);
902 panvk_pipeline_builder_upload_shaders(builder, *pipeline);
903 panvk_pipeline_builder_init_fs_state(builder, *pipeline);
904 panvk_pipeline_builder_alloc_static_state_bo(builder, *pipeline);
905 panvk_pipeline_builder_init_shaders(builder, *pipeline);
906 panvk_pipeline_builder_parse_viewport(builder, *pipeline);
908 panvk_pipeline_builder_compile_shaders(builder, *pipeline);
909 panvk_pipeline_builder_upload_shaders(builder, *pipeline);
910 panvk_pipeline_builder_alloc_static_state_bo(builder, *pipeline);
911 panvk_pipeline_builder_init_shaders(builder, *pipeline);
918 panvk_pipeline_builder_init_graphics(struct panvk_pipeline_builder *builder,
926 *builder = (struct panvk_pipeline_builder) {
934 builder->rasterizer_discard =
937 if (builder->rasterizer_discard) {
938 builder->samples = VK_SAMPLE_COUNT_1_BIT;
940 builder->samples = create_info->pMultisampleState->rasterizationSamples;
945 builder->use_depth_stencil_attachment =
949 builder->active_color_attachments = 0;
955 builder->active_color_attachments |= 1 << i;
956 builder->color_attachment_formats[i] = pass->attachments[idx].format;
973 struct panvk_pipeline_builder builder;
974 panvk_pipeline_builder_init_graphics(&builder, dev, cache,
978 VkResult result = panvk_pipeline_builder_build(&builder, &pipeline);
979 panvk_pipeline_builder_finish(&builder);
997 panvk_pipeline_builder_init_compute(struct panvk_pipeline_builder *builder,
1005 *builder = (struct panvk_pipeline_builder) {
1026 struct panvk_pipeline_builder builder;
1027 panvk_pipeline_builder_init_compute(&builder, dev, cache,
1031 VkResult result = panvk_pipeline_builder_build(&builder, &pipeline);
1032 panvk_pipeline_builder_finish(&builder);