Lines Matching defs:vmul
1002 * condition must be in the former pipeline stage (vmul/sadd),
1174 midgard_instruction *vmul = NULL;
1217 * since we might not have room for a conditional in vmul/sadd.
1286 vmul = cond;
1293 /* Stage 2, let's schedule sadd before vmul for writeout */
1315 /* It's possible we'll be able to schedule something into vmul
1317 * vmul specially that way. */
1330 vmul = peaked;
1331 vmul->unit = UNIT_VMUL;
1344 vmul = ralloc(ctx, midgard_instruction);
1345 *vmul = v_mov(src, temp);
1346 vmul->unit = UNIT_VMUL;
1347 vmul->mask = full_mask ^ writeout_mask;
1362 mir_choose_alu(&vmul, instructions, liveness, worklist, len, &predicate, UNIT_VMUL);
1364 mir_update_worklist(worklist, len, instructions, vmul);
1372 midgard_instruction *stages[] = { vmul, sadd, vadd, smul, vlut, branch };