Lines Matching defs:cond
881 unsigned cond)
883 if (!mir_single_use(ctx, cond))
889 if (instructions[i]->dest != cond)
936 unsigned cond, bool vector, unsigned *swizzle,
942 mir_comparison_mobile(ctx, instructions, predicate, count, cond) : ~0;
953 midgard_instruction mov = v_mov(cond, cond);
979 midgard_instruction *cond = mir_schedule_comparison(
986 predicate->exclude = cond->dest;
987 cond->dest = SSA_FIXED_REGISTER(31);
990 cond->mask = (1 << COMPONENT_W);
992 mir_foreach_src(cond, s) {
993 if (cond->src[s] == ~0)
997 cond->swizzle[s][q + COMPONENT_W] = cond->swizzle[s][q];
1009 cond->unit = UNIT_SMUL;
1011 cond->unit = vector ? UNIT_VMUL : UNIT_SADD;
1013 return cond;
1186 midgard_instruction *cond = mir_schedule_condition(ctx, &predicate, worklist, len, instructions, branch);
1188 if (cond->unit == UNIT_VADD)
1189 vadd = cond;
1190 else if (cond->unit == UNIT_SMUL)
1191 smul = cond;
1283 midgard_instruction *cond = mir_schedule_condition(ctx, &predicate, worklist, len, instructions, ins);
1285 if (cond->unit == UNIT_VMUL)
1286 vmul = cond;
1287 else if (cond->unit == UNIT_SADD)
1288 sadd = cond;