Lines Matching defs:block
274 flatten_mir(midgard_block *block, unsigned *len)
276 *len = list_length(&block->base.instructions);
286 mir_foreach_instr_in_block(block, ins)
862 * same block as a pipeline register. There are two options to enable this:
865 * conditional is used only once and is from this block.
868 * We search for the conditional. If it's in this block, single-use, and
1417 /* Schedule a single block by iterating its instruction to create bundles.
1418 * While we go, tally about the bundle sizes to compute the block size. */
1422 schedule_block(compiler_context *ctx, midgard_block *block)
1426 midgard_instruction **instructions = flatten_mir(block, &len);
1452 block->quadword_count = 0;
1469 ctx->quadword_count + block->quadword_count;
1472 block->quadword_count += midgard_tag_props[bundle.tag].size;
1477 /* We emitted bundles backwards; copy into the block in reverse-order */
1479 util_dynarray_init(&block->bundles, block);
1481 util_dynarray_append(&block->bundles, midgard_bundle, *bundle);
1485 block->scheduled = true;
1486 ctx->quadword_count += block->quadword_count;
1491 mir_foreach_instr_in_block_safe(block, ins) {
1495 mir_foreach_instr_in_block_scheduled_rev(block, ins) {
1496 list_add(&ins->link, &block->base.instructions);
1585 midgard_block *block = (midgard_block *) _block;
1586 midgard_opt_dead_move_eliminate(ctx, block);
1587 schedule_block(ctx, block);