Lines Matching defs:mode
167 unreachable("Invalid expand mode");
353 bits_for_mode(midgard_reg_mode mode)
355 switch (mode) {
365 unreachable("Invalid reg mode");
371 bits_for_mode_halved(midgard_reg_mode mode, bool half)
373 unsigned bits = bits_for_mode(mode);
448 midgard_reg_mode mode,
451 unsigned bits = bits_for_mode_halved(mode, INPUT_EXPANDS(expand));
498 unreachable("Invalid expand mode");
505 if (mode == midgard_reg_mode_64) {
506 print_vec_selectors_64(fp, swizzle, mode, expand, first_half, mask);
511 print_vec_selectors(fp, swizzle, mode, first_half, mask, &mask_offs);
512 if (mode == midgard_reg_mode_8 || mode == midgard_reg_mode_16)
513 print_vec_selectors(fp, swizzle, mode, second_half, mask, &mask_offs);
576 unreachable("invalid expand mode");
603 unreachable("invalid expand mode");
645 midgard_reg_mode mode, unsigned reg,
652 validate_expand_mode(src->expand_mode, mode);
656 print_vec_swizzle(fp, src->swizzle, src->expand_mode, mode, src_mask);
755 /* TODO: 16-bit mode */
796 midgard_reg_mode mode = alu_field->reg_mode;
808 fprintf(fp, ".%c%d", is_int_out ? 'i' : 'f', bits_for_mode(mode));
819 bool shrinkable = (mode != midgard_reg_mode_8);
832 unsigned comp_mask = condense_writemask(mask, bits_for_mode(mode));
837 print_alu_mask(fp, mask, bits_for_mode(mode), shrink_mode);
846 rep ? expand_writemask(mask_of(rep), util_logbase2(128 / bits_for_mode(mode))) : mask;
854 print_vector_src(ctx, fp, alu_field->src1, mode, reg_info->src1_reg,
867 print_vector_src(ctx, fp, alu_field->src2, mode, reg_info->src2_reg,
1022 function_call_mode(enum midgard_call_mode mode)
1024 switch (mode) {
1566 /* Use the upper half in half-reg mode */
1675 texture_mode(enum mali_texture_mode mode)
1677 switch (mode) {
1690 derivative_mode(enum mali_derivative_mode mode)
1692 switch (mode) {
1700 partial_exection_mode(enum midgard_partial_execution mode)
1702 switch (mode) {
1731 fprintf(fp, "%s", derivative_mode(texture->mode));
1733 fprintf(fp, "%s", texture_mode(texture->mode));
1801 * specified in immediate offset mode, with the
1804 * a register offset mode, where the offset_*