Lines Matching refs:dev
118 pan_blitter_emit_blend(const struct panfrost_device *dev,
157 panfrost_format_to_bifrost_blend(dev, iview->format, false);
213 pan_blitter_emit_blends(const struct panfrost_device *dev,
224 pan_blitter_emit_blend(dev, i, rt_view, blit_shader,
232 pan_blitter_emit_rsd(const struct panfrost_device *dev,
321 pan_blitter_emit_blends(dev, blit_shader, views, blend_shaders,
328 pan_blitter_get_blend_shaders(struct panfrost_device *dev,
352 pthread_mutex_lock(&dev->blitter.shaders.lock);
354 _mesa_hash_table_search(dev->blitter.shaders.blend, &key);
358 pthread_mutex_unlock(&dev->blitter.shaders.lock);
362 blend_shader = rzalloc(dev->blitter.shaders.blend,
383 pthread_mutex_lock(&dev->blend_shaders.lock);
385 GENX(pan_blend_get_shader_locked)(dev, &blend_state,
391 (dev->arch >= 7) ? 32 : ((dev->arch == 6) ? 64 : 4);
394 pan_pool_alloc_aligned(dev->blitter.shaders.pool,
400 pthread_mutex_unlock(&dev->blend_shaders.lock);
401 _mesa_hash_table_insert(dev->blitter.shaders.blend,
403 pthread_mutex_unlock(&dev->blitter.shaders.lock);
409 pan_blitter_get_blit_shader(struct panfrost_device *dev,
412 pthread_mutex_lock(&dev->blitter.shaders.lock);
413 struct hash_entry *he = _mesa_hash_table_search(dev->blitter.shaders.blit, key);
605 .gpu_id = dev->gpu_id,
614 shader = rzalloc(dev->blitter.shaders.blit,
629 pan_pool_upload_aligned(dev->blitter.shaders.pool,
643 _mesa_hash_table_insert(dev->blitter.shaders.blit, &shader->key, shader);
646 pthread_mutex_unlock(&dev->blitter.shaders.lock);
696 pan_blitter_get_rsd(struct panfrost_device *dev,
738 pthread_mutex_lock(&dev->blitter.rsds.lock);
740 _mesa_hash_table_search(dev->blitter.rsds.rsds, &rsd_key);
745 rsd = rzalloc(dev->blitter.rsds.rsds, struct pan_blit_rsd_data);
750 pan_pool_alloc_desc_aggregate(dev->blitter.rsds.pool,
757 pan_blitter_get_blit_shader(dev, &blit_key);
759 pan_blitter_get_blend_shaders(dev, views->rt_count, views->dst_rts,
762 pan_blitter_emit_rsd(dev, blit_shader, views, blend_shaders,
765 _mesa_hash_table_insert(dev->blitter.rsds.rsds, &rsd->key, rsd);
768 pthread_mutex_unlock(&dev->blitter.rsds.lock);
773 pan_blit_get_rsd(struct panfrost_device *dev,
801 return pan_blitter_get_rsd(dev, &views);
870 cfg.format = pool->dev->formats[PIPE_FORMAT_R32G32B32_FLOAT].hw;
949 GENX(panfrost_new_texture)(pool->dev, views[i], texture, &surfaces);
966 GENX(panfrost_new_texture)(pool->dev, views[i], texture.cpu, &surfaces);
1114 cfg.state = pan_blitter_get_rsd(pool->dev, &views);
1146 pan_blitter_get_blit_shader(pool->dev, &key);
1166 pan_blitter_get_blend_shaders(pool->dev, views.rt_count, views.dst_rts,
1169 pan_blitter_emit_blends(pool->dev, blit_shader, &views, blend_shaders,
1306 desc_pool->dev->arch > 6 ?
1414 GENX(pan_blit_ctx_init)(struct panfrost_device *dev,
1503 ctx->rsd = pan_blit_get_rsd(dev, sviews, &dview);
1625 pan_blitter_prefill_blit_shader_cache(struct panfrost_device *dev)
1658 pan_blitter_get_blit_shader(dev, &prefill[i]);
1662 GENX(pan_blitter_init)(struct panfrost_device *dev,
1666 dev->blitter.shaders.blit =
1669 dev->blitter.shaders.blend =
1672 dev->blitter.shaders.pool = bin_pool;
1673 pthread_mutex_init(&dev->blitter.shaders.lock, NULL);
1674 pan_blitter_prefill_blit_shader_cache(dev);
1676 dev->blitter.rsds.pool = desc_pool;
1677 dev->blitter.rsds.rsds =
1680 pthread_mutex_init(&dev->blitter.rsds.lock, NULL);
1684 GENX(pan_blitter_cleanup)(struct panfrost_device *dev)
1686 _mesa_hash_table_destroy(dev->blitter.shaders.blit, NULL);
1687 _mesa_hash_table_destroy(dev->blitter.shaders.blend, NULL);
1688 pthread_mutex_destroy(&dev->blitter.shaders.lock);
1689 _mesa_hash_table_destroy(dev->blitter.rsds.rsds, NULL);
1690 pthread_mutex_destroy(&dev->blitter.rsds.lock);