Lines Matching defs:shader
44 * implement blits, which are done as TILER jobs. No vertex shader is
165 cfg.internal.shader.pc = blend_shader;
168 cfg.internal.shader.return_value =
414 struct pan_blit_shader_data *shader = he ? he->data : NULL;
416 if (shader)
466 nir_variable_create(b.shader, nir_var_shader_in,
488 nir_variable_create(b.shader, nir_var_shader_out,
530 nir_tex_instr *tex = nir_tex_instr_create(b.shader, 3);
561 nir_tex_instr_create(b.shader, ms ? 3 : 1);
614 shader = rzalloc(dev->blitter.shaders.blit,
617 nir_shader_gather_info(b.shader, nir_shader_get_entrypoint(b.shader));
620 BITSET_SET(b.shader->info.textures_used, i);
622 GENX(pan_shader_compile)(b.shader, &inputs, &binary, &shader->info);
625 assert(shader->info.sysvals.sysval_count == 0);
627 shader->key = *key;
628 shader->address =
634 ralloc_free(b.shader);
637 for (unsigned i = 0; i < ARRAY_SIZE(shader->blend_ret_offsets); i++) {
638 shader->blend_ret_offsets[i] = shader->info.bifrost.blend[i].return_offset;
639 shader->blend_types[i] = shader->info.bifrost.blend[i].type;
643 _mesa_hash_table_insert(dev->blitter.shaders.blit, &shader->key, shader);
647 return shader;
1197 cfg.shader.resources = T.gpu | nr_tables;
1198 cfg.shader.shader = spd.gpu;
1199 cfg.shader.thread_storage = tsd;