Lines Matching defs:nir
30 #include "compiler/nir/nir_builder.h"
31 #include "compiler/nir/nir_schedule.h"
668 b->shader->nir->info.num_ubos;
846 nir_find_variable_with_driver_location(b->shader->nir,
912 nir_foreach_shader_out_variable(var, b->shader->nir)
1389 util_bitcount64(ctx->nir->info.inputs_read) : 0;
1555 nir_find_variable_with_driver_location(b->shader->nir,
1880 assert(b->shader->nir->info.has_transform_feedback_varyings);
1994 default: unreachable("invalid nir round op");
4184 ctx->nir->info.label ?: "",
4245 ctx->nir->info.label ?: "",
4428 bi_optimize_nir(nir_shader *nir, unsigned gpu_id, bool is_blend)
4433 NIR_PASS(progress, nir, nir_lower_regs_to_ssa);
4443 NIR_PASS(progress, nir, pan_nir_lower_64bit_intrin);
4444 NIR_PASS(progress, nir, pan_lower_helper_invocation);
4446 NIR_PASS(progress, nir, nir_lower_int64);
4452 NIR_PASS(progress, nir, nir_lower_idiv, &idiv_options);
4454 NIR_PASS(progress, nir, nir_lower_tex, &lower_tex_options);
4455 NIR_PASS(progress, nir, nir_lower_alu_to_scalar, bi_scalarize_filter, NULL);
4456 NIR_PASS(progress, nir, nir_lower_load_const_to_scalar);
4461 NIR_PASS(progress, nir, nir_lower_var_copies);
4462 NIR_PASS(progress, nir, nir_lower_vars_to_ssa);
4463 NIR_PASS(progress, nir, nir_lower_wrmasks, should_split_wrmask, NULL);
4465 NIR_PASS(progress, nir, nir_copy_prop);
4466 NIR_PASS(progress, nir, nir_opt_remove_phis);
4467 NIR_PASS(progress, nir, nir_opt_dce);
4468 NIR_PASS(progress, nir, nir_opt_dead_cf);
4469 NIR_PASS(progress, nir, nir_opt_cse);
4470 NIR_PASS(progress, nir, nir_opt_peephole_select, 64, false, true);
4471 NIR_PASS(progress, nir, nir_opt_algebraic);
4472 NIR_PASS(progress, nir, nir_opt_constant_folding);
4474 NIR_PASS(progress, nir, nir_lower_alu);
4479 nir,
4484 NIR_PASS(progress, nir,
4495 NIR_PASS(progress, nir, nir_opt_undef);
4496 NIR_PASS(progress, nir, nir_lower_undef_to_zero);
4498 NIR_PASS(progress, nir, nir_opt_shrink_vectors);
4499 NIR_PASS(progress, nir, nir_opt_loop_unroll);
4504 NIR_PASS(progress, nir, nir_lower_int64);
4512 NIR_PASS(late_algebraic, nir, nir_opt_algebraic_late);
4513 NIR_PASS(progress, nir, nir_opt_constant_folding);
4514 NIR_PASS(progress, nir, nir_copy_prop);
4515 NIR_PASS(progress, nir, nir_opt_dce);
4516 NIR_PASS(progress, nir, nir_opt_cse);
4519 NIR_PASS(progress, nir, nir_lower_alu_to_scalar, bi_scalarize_filter, NULL);
4520 NIR_PASS(progress, nir, nir_lower_phis_to_scalar, true);
4521 NIR_PASS(progress, nir, nir_opt_vectorize, bi_vectorize_filter, NULL);
4522 NIR_PASS(progress, nir, nir_lower_bool_to_bitsize);
4526 NIR_PASS(late_algebraic, nir, bifrost_nir_lower_algebraic_late);
4530 NIR_PASS(late_algebraic, nir, nir_opt_algebraic_late);
4531 NIR_PASS(progress, nir, nir_opt_constant_folding);
4532 NIR_PASS(progress, nir, nir_copy_prop);
4533 NIR_PASS(progress, nir, nir_opt_dce);
4534 NIR_PASS(progress, nir, nir_opt_cse);
4537 NIR_PASS(progress, nir, nir_lower_load_const_to_scalar);
4538 NIR_PASS(progress, nir, nir_opt_dce);
4540 if (nir->info.stage == MESA_SHADER_FRAGMENT) {
4541 NIR_PASS_V(nir, nir_shader_instructions_pass,
4553 NIR_PASS_V(nir, nir_opt_sink, move_all);
4554 NIR_PASS_V(nir, nir_opt_move, move_all);
4559 nir->info.inputs_read_indirectly ||
4560 nir->info.outputs_accessed_indirectly ||
4561 nir->info.patch_inputs_read_indirectly ||
4562 nir->info.patch_outputs_accessed_indirectly ||
4563 nir->info.images_used[0];
4566 nir_convert_to_lcssa(nir, true, true);
4567 NIR_PASS_V(nir, nir_divergence_analysis);
4568 NIR_PASS_V(nir, bi_lower_divergent_indirects,
4570 NIR_PASS_V(nir, nir_shader_instructions_pass,
4825 bi_fp32_varying_mask(nir_shader *nir)
4829 assert(nir->info.stage == MESA_SHADER_FRAGMENT);
4831 nir_foreach_shader_in_variable(var, nir) {
4836 nir_shader_instructions_pass(nir, bi_gather_texcoords, nir_metadata_all, &mask);
4842 bi_finalize_nir(nir_shader *nir, unsigned gpu_id, bool is_blend)
4848 NIR_PASS_V(nir, nir_lower_vars_to_ssa);
4850 if (nir->info.stage == MESA_SHADER_VERTEX) {
4851 NIR_PASS_V(nir, nir_lower_viewport_transform);
4852 NIR_PASS_V(nir, nir_lower_point_size, 1.0, 0.0);
4854 nir_variable *psiz = nir_find_variable_with_location(nir,
4862 NIR_PASS_V(nir, nir_lower_global_vars_to_local);
4873 NIR_PASS_V(nir, nir_lower_vars_to_scratch, nir_var_function_temp, 256,
4877 NIR_PASS_V(nir, nir_lower_indirect_derefs, nir_var_function_temp, ~0);
4879 NIR_PASS_V(nir, nir_split_var_copies);
4880 NIR_PASS_V(nir, nir_lower_var_copies);
4881 NIR_PASS_V(nir, nir_lower_vars_to_ssa);
4882 NIR_PASS_V(nir, nir_lower_io, nir_var_shader_in | nir_var_shader_out,
4889 NIR_PASS_V(nir, nir_opt_constant_folding);
4891 if (nir->info.stage == MESA_SHADER_FRAGMENT) {
4892 NIR_PASS_V(nir, nir_lower_mediump_io,
4894 ~bi_fp32_varying_mask(nir), false);
4897 NIR_PASS_V(nir, nir_lower_mediump_io, nir_var_shader_out,
4902 NIR_PASS_V(nir, nir_shader_instructions_pass,
4909 NIR_PASS_V(nir, nir_lower_ssbo);
4910 NIR_PASS_V(nir, pan_nir_lower_zs_store);
4911 NIR_PASS_V(nir, pan_lower_sample_pos);
4912 NIR_PASS_V(nir, nir_lower_bit_size, bi_lower_bit_size, NULL);
4914 if (nir->info.stage == MESA_SHADER_FRAGMENT) {
4915 NIR_PASS_V(nir, nir_shader_instructions_pass,
4921 if (nir->xfb_info != NULL && nir->info.has_transform_feedback_varyings) {
4922 NIR_PASS_V(nir, nir_io_add_const_offset_to_base,
4924 NIR_PASS_V(nir, nir_io_add_intrinsic_xfb_info);
4925 NIR_PASS_V(nir, pan_lower_xfb);
4928 bi_optimize_nir(nir, gpu_id, is_blend);
4932 bi_compile_variant_nir(nir_shader *nir,
4946 ctx->nir = nir;
4947 ctx->stage = nir->info.stage;
4960 ctx->nir = nir = nir_shader_clone(ctx, nir);
4962 NIR_PASS_V(nir, nir_shader_instructions_pass,
4973 NIR_PASS(progress, nir, nir_opt_dce);
4974 NIR_PASS(progress, nir, nir_opt_dead_cf);
4981 NIR_PASS_V(nir, nir_convert_from_ssa, true);
4988 bool skip_internal = nir->info.internal;
4992 nir_print_shader(nir, stdout);
4997 nir_foreach_function(func, nir) {
5189 bi_compile_variant(nir_shader *nir,
5218 bi_context *ctx = bi_compile_variant_nir(nir, inputs, binary, sysval_to_id, local_info, idvs);
5235 if (nir->info.stage == MESA_SHADER_FRAGMENT && ctx->arch >= 9)
5252 !nir->info.internal &&
5253 nir->info.outputs_written & BITFIELD_BIT(VARYING_SLOT_PSIZ)) {
5284 bi_should_idvs(nir_shader *nir, const struct panfrost_compile_inputs *inputs)
5291 if (nir->info.stage != MESA_SHADER_VERTEX)
5296 nir->info.outputs_written & BITFIELD_BIT(VARYING_SLOT_PSIZ))
5304 bifrost_compile_shader_nir(nir_shader *nir,
5311 bi_finalize_nir(nir, inputs->gpu_id, inputs->is_blend);
5317 info->tls_size = nir->scratch_size;
5318 info->vs.idvs = bi_should_idvs(nir, inputs);
5321 bi_compile_variant(nir, inputs, binary, sysval_to_id, info, BI_IDVS_POSITION);
5322 bi_compile_variant(nir, inputs, binary, sysval_to_id, info, BI_IDVS_VARYING);
5324 bi_compile_variant(nir, inputs, binary, sysval_to_id, info, BI_IDVS_NONE);
5327 if (gl_shader_stage_is_compute(nir->info.stage)) {
5334 (nir->info.shared_size == 0) &&
5335 !nir->info.uses_control_barrier &&
5336 !nir->info.uses_memory_barrier;
5339 info->ubo_mask &= (1 << nir->info.num_ubos) - 1;