Lines Matching defs:vec32
41 extract_comps_from_vec32(nir_builder *b, nir_ssa_def *vec32,
50 for (unsigned i = 0; i < vec32->num_components; i += step) {
53 tmp = nir_pack_64_2x32_split(b, nir_channel(b, vec32, i),
54 nir_channel(b, vec32, i + 1));
58 dst_comps[i] = nir_channel(b, vec32, i);
64 tmp = nir_unpack_bits(b, nir_channel(b, vec32, i), dst_bit_size);
145 nir_ssa_def *vec32 = build_load_ptr_dxil(b, path.path[0], idx);
149 vec32 = nir_vec2(b, vec32,
159 vec32 = nir_ushr(b, vec32, shift);
163 extract_comps_from_vec32(b, vec32, bit_size, &comps[comp_idx],
177 ubo_load_select_32b_comps(nir_builder *b, nir_ssa_def *vec32,
183 assert(vec32->num_components == 4);
187 return vec32;
193 comps[i] = nir_channel(b, vec32, i);
235 nir_ssa_def *vec32 =
238 /* First re-arrange the vec32 to account for intra 16-byte offset. */
239 vec32 = ubo_load_select_32b_comps(b, vec32, offset, subload_num_bits / 8);
248 vec32 = nir_ushr(b, vec32, shift);
252 extract_comps_from_vec32(b, vec32, bit_size, &comps[comp_idx],
291 nir_ssa_def *vec32 =
304 vec32 = nir_ushr(b, vec32, shift);
308 extract_comps_from_vec32(b, vec32, bit_size, &comps[comp_idx],
372 nir_ssa_def *vec32 = load_comps_to_vec32(b, bit_size, &comps[comp_idx],
387 vec32 = nir_ishl(b, vec32, shift);
393 store->src[0] = nir_src_for_ssa(vec32);
400 store->src[0] = nir_src_for_ssa(vec32);
470 nir_ssa_def *vec32 = nir_vec(b, &comps_32bit[i], num_vec32_comps);
479 vec32 = nir_ushr(b, vec32, shift);
484 extract_comps_from_vec32(b, vec32, bit_size, &comps[dest_index], num_dest_comps);
495 lower_store_vec32(nir_builder *b, nir_ssa_def *index, nir_ssa_def *vec32, nir_intrinsic_op op)
498 for (unsigned i = 0; i < vec32->num_components; i++) {
502 store->src[0] = nir_src_for_ssa(nir_channel(b, vec32, i));
511 nir_ssa_def *vec32, unsigned num_bits, nir_intrinsic_op op)
523 vec32 = nir_ishl(b, vec32, shift);
529 nir_store_shared_masked_dxil(b, vec32, nir_inot(b, mask), index);
534 nir_ssa_def *new_val = nir_ior(b, vec32,
573 nir_ssa_def *vec32 = load_comps_to_vec32(b, bit_size, &comps[comp_idx],
581 lower_masked_store_vec32(b, local_offset, index, vec32, num_bits, op);
583 lower_store_vec32(b, index, vec32, op);