Lines Matching refs:result
78 VkResult result;
204 result = anv_device_alloc_bo(device, "query-pool", size,
209 if (result != VK_SUCCESS)
237 return result;
385 uint32_t value_index, uint64_t result)
389 dst64[value_index] = result;
392 dst32[value_index] = result;
482 * both not set then no result values are written to pData for
491 * that the result should contain the number of counters that were recorded
506 * is unavailable, an intermediate result value between zero and
507 * the final result value is written to pData for that query."
509 uint64_t result = available ? slot[2] - slot[1] : 0;
510 cpu_write_query_result(pData, flags, idx, result);
522 uint64_t result = slot[idx * 2 + 2] - slot[idx * 2 + 1];
527 result >>= 2;
529 cpu_write_query_result(pData, flags, idx, result);
563 struct intel_perf_query_result result;
564 intel_perf_query_result_clear(&result);
565 intel_perf_query_result_accumulate_fields(&result, query,
569 anv_perf_write_pass_results(pdevice->perf, pool, p, &result, pData);
580 struct intel_perf_query_result result;
581 intel_perf_query_result_clear(&result);
582 intel_perf_query_result_accumulate_fields(&result, query,
588 query, &result);
1266 * but we still need to manage result availability for all the query indices.
1269 * with result 0.
1320 * but we still need to manage result availability for all the query indices.
1323 * with result 0.
1409 struct mi_value result;
1450 result = compute_query_result(&b, anv_address_add(query_addr, 8));
1453 * conservatively write 0 as the query result. If the
1457 1 /* available */, flags, idx, result);
1470 result = compute_query_result(&b, anv_address_add(query_addr,
1477 result = mi_ushr32_imm(&b, result, 2);
1480 gpu_write_query_result(&b, dest_addr, flags, idx++, result);
1487 result = compute_query_result(&b, anv_address_add(query_addr, 8));
1488 gpu_write_query_result(&b, dest_addr, flags, idx++, result);
1489 result = compute_query_result(&b, anv_address_add(query_addr, 24));
1490 gpu_write_query_result(&b, dest_addr, flags, idx++, result);
1494 result = mi_mem64(anv_address_add(query_addr, 8));
1495 gpu_write_query_result(&b, dest_addr, flags, idx++, result);