Lines Matching defs:batch
150 uint64s_per_slot = 4 /* availability + small batch */;
216 struct anv_batch batch = {
220 batch.next = batch.start;
222 mi_builder_init(&b, &device->info, &batch);
225 anv_batch_emit(&batch, GENX(MI_BATCH_BUFFER_END), bbe);
262 * | Small batch loading | | |
274 * | Small batch loading | | |
286 * | Small batch loading | | |
332 if (anv_batch_has_error(&cmd_buffer->batch))
347 anv_batch_set_error(&cmd_buffer->batch, VK_ERROR_OUT_OF_HOST_MEMORY);
619 anv_batch_emit(&cmd_buffer->batch, GENX(PIPE_CONTROL), pc) {
646 anv_batch_emit(&cmd_buffer->batch, GENX(PIPE_CONTROL), pc) {
763 mi_builder_init(&b, &cmd_buffer->device->info, &cmd_buffer->batch);
773 mi_builder_init(&b, &cmd_buffer->device->info, &cmd_buffer->batch);
789 mi_builder_init(&b, &cmd_buffer->device->info, &cmd_buffer->batch);
880 anv_batch_emit(&cmd_buffer->batch, GENX(MI_REPORT_PERF_COUNT), rpc) {
928 mi_builder_init(&b, &cmd_buffer->device->info, &cmd_buffer->batch);
936 anv_batch_emit(&cmd_buffer->batch, GENX(PIPE_CONTROL), pc) {
946 anv_batch_emit(&cmd_buffer->batch, GENX(PIPE_CONTROL), pc) {
962 anv_batch_emit(&cmd_buffer->batch, GENX(PIPE_CONTROL), pc) {
1020 anv_batch_emit(&cmd_buffer->batch, GENX(PIPE_CONTROL), pc) {
1034 dws = anv_batch_emitn(&cmd_buffer->batch,
1050 anv_batch_emitn(&cmd_buffer->batch,
1061 anv_batch_emitn(&cmd_buffer->batch,
1083 anv_batch_emit(&cmd_buffer->batch, GENX(PIPE_CONTROL), pc) {
1115 mi_builder_init(&b, &cmd_buffer->device->info, &cmd_buffer->batch);
1127 anv_batch_emit(&cmd_buffer->batch, GENX(PIPE_CONTROL), pc) {
1139 anv_batch_emit(&cmd_buffer->batch, GENX(PIPE_CONTROL), pc) {
1157 anv_batch_emit(&cmd_buffer->batch, GENX(PIPE_CONTROL), pc) {
1168 anv_batch_emit(&cmd_buffer->batch, GENX(PIPE_CONTROL), pc) {
1186 dws = anv_batch_emitn(&cmd_buffer->batch,
1202 anv_batch_emitn(&cmd_buffer->batch,
1213 anv_batch_emitn(&cmd_buffer->batch,
1232 anv_batch_emitn(&cmd_buffer->batch,
1247 anv_batch_emit(&cmd_buffer->batch, GENX(PIPE_CONTROL), pc) {
1294 mi_builder_init(&b, &cmd_buffer->device->info, &cmd_buffer->batch);
1305 anv_batch_emit(&cmd_buffer->batch, GENX(PIPE_CONTROL), pc) {
1355 anv_batch_emit(&cmd_buffer->batch, GENX(MI_PREDICATE), mip) {
1408 mi_builder_init(&b, &cmd_buffer->device->info, &cmd_buffer->batch);