Lines Matching defs:state
134 * (1) the dynamic state pool is located within the same 4 GiB as the low
139 * state pool, within a 4 GiB range. This allows surface state base addresses
230 * "The surface state model is used when a Binding Table Index (specified
634 * both the block pool and the state pools. Unfortunately, in order to
724 struct anv_block_state state;
740 return pool->state.end + pool->back_state.end;
764 struct anv_state state;
772 struct anv_block_state state;
779 /* Offset into the relevant state base address where the state pool starts
804 /* The size of blocks to allocate from the state pool */
810 /* Offset into the current block at which to allocate the next state */
818 * only be used via a state pool (see below).
843 void anv_state_pool_free(struct anv_state_pool *pool, struct anv_state state);
858 struct anv_state state);
876 return &table->map[idx].state;
1321 anv_binding_table_pool_free(struct anv_device *device, struct anv_state state) {
1322 anv_state_pool_free(anv_binding_table_pool(device), state);
1766 * to the dynamic state base address.
1807 /** The descriptor contains a BTI reference to a surface state */
1809 /** The descriptor contains a BTI reference to a sampler state */
1848 /* Index into the dynamic state array for a dynamic buffer */
1960 /* Surface state for the descriptor buffer */
2534 struct anv_state state;
2535 /** Address of the surface referred to by this state
2622 * anv_cmd_compute_state. These are used to track state which is bound to a
2623 * particular type of pipeline. Generic state that applies per-stage such as
2633 /* Push constant state allocated when flushing push constants. */
2640 * bound to a graphics pipeline. Along with general pipeline bind point state
2642 * state which is graphics-specific.
2691 * bound to a compute pipeline. Along with general pipeline bind point state
2693 * state which is compute-specific.
2761 * For secondary command buffer execution, we transfer the state from the
2772 * Pending state of the RHWO optimization, to be applied at the next
2841 /** Last seen surface state block pool center bo offset */
2856 struct anv_cmd_state state;
2975 enum anv_bo_sync_state state;
2995 struct anv_state state;
3159 * with dynamic state.
3250 const struct anv_cmd_graphics_state *state = &cmd_buffer->state.gfx;
3256 if ((color_writes & ((1u << state->color_att_count) - 1)) == 0)
3260 for (uint32_t i = 0; i < state->color_att_count; i++) {
3261 if (state->pipeline->color_comp_writes[i] != 0)
3482 * aux state in this binding.
3588 /** Location of the fast clear state. */
4026 struct anv_state state,
4077 uint32_t state[3][4];
4081 /* Blob of sampler state data which is guaranteed to be 32-byte aligned
4155 cmd_buffer->state.pending_pipe_bits |= bits;