Lines Matching refs:planes
334 * @see anv_image::planes[]::shadow_surface
381 if (!isl_aux_usage_has_fast_clears(image->planes[plane].aux_usage))
392 image->planes[plane].aux_usage == ISL_AUX_USAGE_CCS_E)
404 enum isl_format img_format = image->planes[plane].primary_surface.isl.format;
649 assert(image->planes[plane].aux_usage != ISL_AUX_USAGE_NONE &&
661 if (image->planes[plane].aux_usage == ISL_AUX_USAGE_CCS_E) {
688 &image->planes[plane].fast_clear_memory_range);
715 assert(!anv_surface_is_valid(&image->planes[plane].aux_surface));
754 &image->planes[plane].primary_surface.isl,
755 &image->planes[plane].aux_surface.isl);
760 &image->planes[plane].primary_surface.isl,
761 &image->planes[plane].aux_surface.isl)) {
762 image->planes[plane].aux_usage = ISL_AUX_USAGE_HIZ;
775 image->planes[plane].aux_usage = ISL_AUX_USAGE_HIZ_CCS_WT;
778 image->planes[plane].aux_usage = ISL_AUX_USAGE_HIZ_CCS;
781 result = add_surface(device, image, &image->planes[plane].aux_surface,
787 if (image->planes[plane].aux_usage == ISL_AUX_USAGE_HIZ_CCS_WT)
795 &image->planes[plane].primary_surface.isl,
799 image->planes[plane].aux_usage = ISL_AUX_USAGE_STC_CCS;
825 &image->planes[plane].primary_surface.isl,
827 &image->planes[plane].aux_surface.isl,
836 image->planes[plane].aux_usage = ISL_AUX_USAGE_CCS_E;
841 image->planes[plane].aux_surface.isl.size_B = 0;
844 image->planes[plane].aux_usage = ISL_AUX_USAGE_CCS_D;
855 result = add_surface(device, image, &image->planes[plane].aux_surface,
865 &image->planes[plane].primary_surface.isl,
866 &image->planes[plane].aux_surface.isl);
870 image->planes[plane].aux_usage = ISL_AUX_USAGE_MCS;
872 result = add_surface(device, image, &image->planes[plane].aux_surface,
895 &image->planes[plane].shadow_surface.isl,
915 return add_surface(device, image, &image->planes[plane].shadow_surface,
936 struct anv_surface *anv_surf = &image->planes[plane].primary_surface;
960 image->planes[plane].aux_usage = ISL_AUX_USAGE_NONE;
1042 const struct anv_image_plane *plane = &image->planes[p];
1166 const struct anv_image_plane *plane = &image->planes[i];
1298 * planes to format planes and aux planes due to the lack of defined ABI
1478 * A disjoint image consists of multiple disjoint planes, and is created
1519 image->planes[p].can_non_zero_fast_clear =
1539 assert(image->planes[0].primary_surface.memory_range.binding ==
1964 image->planes[p].primary_surface.memory_range.binding;
1974 if (!isl_aux_usage_has_ccs(image->planes[p].aux_usage))
1980 if (image->planes[p].aux_surface.memory_range.size > 0) {
1981 assert(image->planes[p].aux_usage == ISL_AUX_USAGE_HIZ_CCS ||
1982 image->planes[p].aux_usage == ISL_AUX_USAGE_HIZ_CCS_WT);
1983 image->planes[p].aux_usage = ISL_AUX_USAGE_HIZ;
1985 assert(image->planes[p].aux_usage == ISL_AUX_USAGE_CCS_E ||
1986 image->planes[p].aux_usage == ISL_AUX_USAGE_STC_CCS);
1987 image->planes[p].aux_usage = ISL_AUX_USAGE_NONE;
2046 assert(image->planes[0].aux_surface.memory_range.binding ==
2047 image->planes[0].primary_surface.memory_range.binding);
2048 surface = &image->planes[0].aux_surface;
2051 surface = &image->planes[mem_plane].primary_surface;
2056 surface = &image->planes[plane].primary_surface;
2116 const enum isl_aux_usage aux_usage = image->planes[plane].aux_usage;
2120 assert(image->planes[plane].primary_surface.isl.tiling != ISL_TILING_LINEAR);
2310 if (image->planes[plane].aux_usage == ISL_AUX_USAGE_NONE)
2322 assert(image->planes[plane].aux_usage == ISL_AUX_USAGE_CCS_D);
2328 return image->planes[plane].aux_usage;
2342 return image->planes[plane].aux_usage;
2377 if (image->planes[plane].aux_usage == ISL_AUX_USAGE_NONE)
2399 if (!image->planes[plane].can_non_zero_fast_clear)
2407 } else if (image->planes[plane].aux_usage == ISL_AUX_USAGE_MCS ||
2408 image->planes[plane].aux_usage == ISL_AUX_USAGE_CCS_E) {
2411 if (!image->planes[plane].can_non_zero_fast_clear)
2478 const struct anv_surface *surface = &image->planes[plane].primary_surface,
2479 *aux_surface = &image->planes[plane].aux_surface;
2489 if (anv_surface_is_valid(&image->planes[plane].shadow_surface) &&
2494 assert(image->planes[plane].shadow_surface.isl.tiling != ISL_TILING_LINEAR);
2495 surface = &image->planes[plane].shadow_surface;
2501 if (anv_surface_is_valid(&image->planes[plane].shadow_surface) &&
2505 surface = &image->planes[plane].shadow_surface;
2711 /* Now go through the underlying image selected planes and map them to
2712 * planes in the image view.
2723 iview->planes[vplane].image_plane = iplane;
2725 iview->planes[vplane].isl = (struct isl_view) {
2741 iview->planes[vplane].isl.base_array_layer = 0;
2742 iview->planes[vplane].isl.array_len = iview->vk.extent.depth;
2747 iview->planes[vplane].isl.usage = ISL_SURF_USAGE_CUBE_BIT;
2749 iview->planes[vplane].isl.usage = 0;
2754 iview->planes[vplane].optimal_sampler_surface_state.state = alloc_surface_state(device);
2755 iview->planes[vplane].general_sampler_surface_state.state = alloc_surface_state(device);
2767 &iview->planes[vplane].isl,
2771 &iview->planes[vplane].optimal_sampler_surface_state,
2775 &iview->planes[vplane].isl,
2779 &iview->planes[vplane].general_sampler_surface_state,
2789 iview->planes[vplane].storage_surface_state.state = alloc_surface_state(device);
2791 &iview->planes[vplane].isl,
2795 &iview->planes[vplane].storage_surface_state,
2799 iview->planes[vplane].lowered_storage_surface_state.state =
2803 &iview->planes[vplane].isl,
2807 &iview->planes[vplane].lowered_storage_surface_state,
2809 &iview->planes[vplane].lowered_storage_image_param);
2819 iview->planes[vplane].lowered_storage_surface_state.state =
2845 if (iview->planes[plane].optimal_sampler_surface_state.state.offset) {
2847 iview->planes[plane].optimal_sampler_surface_state.state);
2850 if (iview->planes[plane].general_sampler_surface_state.state.offset) {
2852 iview->planes[plane].general_sampler_surface_state.state);
2855 if (iview->planes[plane].storage_surface_state.state.offset) {
2857 iview->planes[plane].storage_surface_state.state);
2860 if (iview->planes[plane].lowered_storage_surface_state.state.offset) {
2862 iview->planes[plane].lowered_storage_surface_state.state);