Lines Matching refs:perf
43 #include "perf/intel_perf.h"
44 #include "perf/intel_perf_regs.h"
45 #include "perf/intel_perf_mdapi.h"
46 #include "perf/intel_perf_metrics.h"
47 #include "perf/intel_perf_private.h"
71 get_sysfs_dev_dir(struct intel_perf_config *perf, int fd)
79 perf->sysfs_dev_dir[0] = '\0';
97 len = snprintf(perf->sysfs_dev_dir,
98 sizeof(perf->sysfs_dev_dir),
100 if (len < 0 || len >= sizeof(perf->sysfs_dev_dir)) {
105 drmdir = opendir(perf->sysfs_dev_dir);
107 DBG("Failed to open %s: %m\n", perf->sysfs_dev_dir);
112 if (is_dir_or_link(drm_entry, perf->sysfs_dev_dir) &&
115 len = snprintf(perf->sysfs_dev_dir,
116 sizeof(perf->sysfs_dev_dir),
120 if (len < 0 || len >= sizeof(perf->sysfs_dev_dir))
157 read_sysfs_drm_device_file_uint64(struct intel_perf_config *perf,
164 len = snprintf(buf, sizeof(buf), "%s/%s", perf->sysfs_dev_dir, file);
174 register_oa_config(struct intel_perf_config *perf,
180 intel_perf_append_query_info(perf, 0);
189 enumerate_sysfs_metrics(struct intel_perf_config *perf,
197 len = snprintf(buf, sizeof(buf), "%s/metrics", perf->sysfs_dev_dir);
216 entry = _mesa_hash_table_search(perf->oa_metrics_table,
220 if (!intel_perf_load_metric_id(perf, metric_entry->d_name, &id)) {
225 register_oa_config(perf, devinfo,
235 add_all_metrics(struct intel_perf_config *perf,
238 hash_table_foreach(perf->oa_metrics_table, entry) {
240 register_oa_config(perf, devinfo, query, 0);
245 kernel_has_dynamic_config_support(struct intel_perf_config *perf, int fd)
254 i915_query_perf_config_supported(struct intel_perf_config *perf, int fd)
263 i915_query_perf_config_data(struct intel_perf_config *perf,
300 i915_add_config(struct intel_perf_config *perf, int fd,
322 init_oa_configs(struct intel_perf_config *perf, int fd,
325 hash_table_foreach(perf->oa_metrics_table, entry) {
329 if (intel_perf_load_metric_id(perf, query->guid, &config_id)) {
331 register_oa_config(perf, devinfo, query, config_id);
335 int ret = i915_add_config(perf, fd, &query->config, query->guid);
342 register_oa_config(perf, devinfo, query, ret);
348 compute_topology_builtins(struct intel_perf_config *perf)
350 const struct intel_device_info *devinfo = &perf->devinfo;
352 perf->sys_vars.slice_mask = devinfo->slice_masks;
353 perf->sys_vars.n_eu_slices = devinfo->num_slices;
355 perf->sys_vars.n_eu_slice0123 = 0;
366 perf->sys_vars.n_eu_slice0123++;
372 perf->sys_vars.n_eu_sub_slices +=
377 perf->sys_vars.n_eus += util_bitcount(devinfo->eu_masks[i]);
386 perf->sys_vars.subslice_mask = 0;
393 perf->sys_vars.subslice_mask |= 1ULL << (s * bits_per_subslice + ss);
399 init_oa_sys_vars(struct intel_perf_config *perf,
405 if (!read_sysfs_drm_device_file_uint64(perf, "gt_min_freq_mhz", &min_freq_mhz))
408 if (!read_sysfs_drm_device_file_uint64(perf, "gt_max_freq_mhz", &max_freq_mhz))
415 memset(&perf->sys_vars, 0, sizeof(perf->sys_vars));
416 perf->sys_vars.gt_min_freq = min_freq_mhz * 1000000;
417 perf->sys_vars.gt_max_freq = max_freq_mhz * 1000000;
418 perf->sys_vars.query_mode = use_register_snapshots;
419 compute_topology_builtins(perf);
642 build_unique_counter_list(struct intel_perf_config *perf)
644 assert(perf->n_queries < 64);
648 for (int q = 0; q < perf->n_queries; q++)
649 max_counters += perf->queries[q].n_counters;
657 ralloc_array_size(perf, sizeof(counter_infos[0]), max_counters);
659 perf->n_counters = 0;
662 _mesa_hash_table_create(perf,
666 for (int q = 0; q < perf->n_queries ; q++) {
667 struct intel_perf_query_info *query = &perf->queries[q];
681 assert(perf->n_counters < max_counters);
683 counter_info = &counter_infos[perf->n_counters++];
697 perf->counter_infos = reralloc_array_size(perf, counter_infos,
698 sizeof(counter_infos[0]), perf->n_counters);
700 qsort(perf->counter_infos, perf->n_counters, sizeof(perf->counter_infos[0]),
705 oa_metrics_available(struct intel_perf_config *perf, int fd,
713 perf->devinfo = *devinfo;
714 perf->i915_query_supported = i915_query_perf_config_supported(perf, fd);
715 perf->i915_perf_version = i915_perf_version(fd);
719 perf->oa_timestamp_shift = 1;
721 perf->oa_timestamp_mask =
722 0xffffffffffffffffull >> (32 + perf->oa_timestamp_shift);
725 i915_get_sseu(fd, &perf->sseu);
728 * the i915 perf interface.
746 perf->platform_supported = oa_register != NULL;
751 get_sysfs_dev_dir(perf, fd) &&
752 init_oa_sys_vars(perf, use_register_snapshots);
756 load_oa_metrics(struct intel_perf_config *perf, int fd,
759 int existing_queries = perf->n_queries;
763 perf->oa_metrics_table =
764 _mesa_hash_table_create(perf, _mesa_hash_string,
770 oa_register(perf);
773 if (kernel_has_dynamic_config_support(perf, fd))
774 init_oa_configs(perf, fd, devinfo);
776 enumerate_sysfs_metrics(perf, devinfo);
778 add_all_metrics(perf, devinfo);
782 for (int i = existing_queries; i < perf->n_queries; ++i)
783 sort_query(&perf->queries[i]);
788 for (int i = existing_queries; i < perf->n_queries; i++) {
789 if (perf->queries[i].symbol_name &&
790 strcmp(perf->queries[i].symbol_name, "TestOa") == 0) {
791 perf->fallback_raw_oa_metric = perf->queries[i].oa_metrics_set_id;
795 if (perf->fallback_raw_oa_metric == 0 && perf->n_queries > 0)
796 perf->fallback_raw_oa_metric = perf->queries[perf->n_queries - 1].oa_metrics_set_id;
881 get_passes_mask(struct intel_perf_config *perf,
887 assert(perf->n_queries < 64);
895 for (uint32_t q = 0; q < perf->n_queries; q++) {
897 assert(counter_indices[i] < perf->n_counters);
900 if (util_bitcount64(perf->counter_infos[idx].query_mask) != (q + 1))
903 if (queries_mask & perf->counter_infos[idx].query_mask)
906 queries_mask |= BITFIELD64_BIT(ffsll(perf->counter_infos[idx].query_mask) - 1);
914 intel_perf_get_n_passes(struct intel_perf_config *perf,
919 uint64_t queries_mask = get_passes_mask(perf, counter_indices, counter_indices_count);
923 for (uint32_t q = 0; q < perf->n_queries; q++) {
925 pass_queries[pass++] = &perf->queries[q];
933 intel_perf_get_counters_passes(struct intel_perf_config *perf,
938 uint64_t queries_mask = get_passes_mask(perf, counter_indices, counter_indices_count);
942 assert(counter_indices[i] < perf->n_counters);
945 counter_pass[i].counter = perf->counter_infos[idx].counter;
947 uint32_t query_idx = ffsll(perf->counter_infos[idx].query_mask & queries_mask) - 1;
948 counter_pass[i].query = &perf->queries[query_idx];
1052 return report[1] >> query->perf->oa_timestamp_shift;
1092 if (can_use_mi_rpc_bc_counters(&query->perf->devinfo)) {
1196 const struct intel_perf_query_field_layout *layout = &query->perf->query_layout;
1197 const struct intel_device_info *devinfo = &query->perf->devinfo;
1206 /* no_oa_accumulate=true is used when doing GL perf queries, we
1254 const struct intel_perf_query_field_layout *layout = &query->perf->query_layout;