Lines Matching defs:query
176 const struct intel_perf_query_info *query,
182 *registered_query = *query;
185 registered_query->oa_metrics_set_id, query->guid);
239 const struct intel_perf_query_info *query = entry->data;
240 register_oa_config(perf, devinfo, query, 0);
269 struct drm_i915_query_perf_config *query = (void *)data;
271 memcpy(query->uuid, guid, sizeof(query->uuid));
272 memcpy(query->data, config, sizeof(*config));
277 query, &item_length))
280 memcpy(config, query->data, sizeof(*config));
326 const struct intel_perf_query_info *query = entry->data;
329 if (intel_perf_load_metric_id(perf, query->guid, &config_id)) {
330 DBG("metric set: %s (already loaded)\n", query->guid);
331 register_oa_config(perf, devinfo, query, config_id);
335 int ret = i915_add_config(perf, fd, &query->config, query->guid);
338 query->name, query->guid, strerror(errno));
342 register_oa_config(perf, devinfo, query, ret);
343 DBG("metric set: %s (added)\n", query->guid);
383 * Ideally equations would be updated to have a slice/subslice query
501 struct intel_perf_query_info *query =
504 query->kind = INTEL_PERF_QUERY_TYPE_PIPELINE;
505 query->name = "Pipeline Statistics Registers";
507 intel_perf_query_add_basic_stat_reg(query, IA_VERTICES_COUNT,
509 intel_perf_query_add_basic_stat_reg(query, IA_PRIMITIVES_COUNT,
511 intel_perf_query_add_basic_stat_reg(query, VS_INVOCATION_COUNT,
515 intel_perf_query_add_stat_reg(query, GFX6_SO_PRIM_STORAGE_NEEDED, 1, 1,
518 intel_perf_query_add_stat_reg(query, GFX6_SO_NUM_PRIMS_WRITTEN, 1, 1,
522 intel_perf_query_add_stat_reg(query, GFX7_SO_PRIM_STORAGE_NEEDED(0), 1, 1,
525 intel_perf_query_add_stat_reg(query, GFX7_SO_PRIM_STORAGE_NEEDED(1), 1, 1,
528 intel_perf_query_add_stat_reg(query, GFX7_SO_PRIM_STORAGE_NEEDED(2), 1, 1,
531 intel_perf_query_add_stat_reg(query, GFX7_SO_PRIM_STORAGE_NEEDED(3), 1, 1,
534 intel_perf_query_add_stat_reg(query, GFX7_SO_NUM_PRIMS_WRITTEN(0), 1, 1,
537 intel_perf_query_add_stat_reg(query, GFX7_SO_NUM_PRIMS_WRITTEN(1), 1, 1,
540 intel_perf_query_add_stat_reg(query, GFX7_SO_NUM_PRIMS_WRITTEN(2), 1, 1,
543 intel_perf_query_add_stat_reg(query, GFX7_SO_NUM_PRIMS_WRITTEN(3), 1, 1,
548 intel_perf_query_add_basic_stat_reg(query, HS_INVOCATION_COUNT,
550 intel_perf_query_add_basic_stat_reg(query, DS_INVOCATION_COUNT,
553 intel_perf_query_add_basic_stat_reg(query, GS_INVOCATION_COUNT,
555 intel_perf_query_add_basic_stat_reg(query, GS_PRIMITIVES_COUNT,
558 intel_perf_query_add_basic_stat_reg(query, CL_INVOCATION_COUNT,
560 intel_perf_query_add_basic_stat_reg(query, CL_PRIMITIVES_COUNT,
564 intel_perf_query_add_stat_reg(query, PS_INVOCATION_COUNT, 1, 4,
568 intel_perf_query_add_basic_stat_reg(query, PS_INVOCATION_COUNT,
572 intel_perf_query_add_basic_stat_reg(query, PS_DEPTH_COUNT,
576 intel_perf_query_add_basic_stat_reg(query, CS_INVOCATION_COUNT,
580 query->data_size = sizeof(uint64_t) * query->n_counters;
582 sort_query(query);
667 struct intel_perf_query_info *query = &perf->queries[q];
669 for (int c = 0; c < query->n_counters; c++) {
673 counter = &query->counters[c];
717 /* TODO: We should query this from i915 */
948 counter_pass[i].query = &perf->queries[query_idx];
1049 intel_perf_report_timestamp(const struct intel_perf_query_info *query,
1052 return report[1] >> query->perf->oa_timestamp_shift;
1057 const struct intel_perf_query_info *query,
1067 result->begin_timestamp = intel_perf_report_timestamp(query, start);
1068 result->end_timestamp = intel_perf_report_timestamp(query, end);
1071 switch (query->oa_format) {
1073 result->accumulator[query->gpu_time_offset] =
1074 intel_perf_report_timestamp(query, end) -
1075 intel_perf_report_timestamp(query, start);
1078 result->accumulator + query->gpu_clock_offset); /* clock */
1083 result->accumulator + query->a_offset + i);
1089 result->accumulator + query->a_offset + 32 + i);
1092 if (can_use_mi_rpc_bc_counters(&query->perf->devinfo)) {
1096 result->accumulator + query->b_offset + i);
1102 result->accumulator + query->c_offset + i);
1108 result->accumulator[query->gpu_time_offset] =
1109 intel_perf_report_timestamp(query, end) -
1110 intel_perf_report_timestamp(query, start);
1114 result->accumulator + query->a_offset + i);
1155 const struct intel_perf_query_info *query,
1163 result->accumulator[query->perfcnt_offset + i] = v0 > v1 ?
1170 query_accumulator_offset(const struct intel_perf_query_info *query,
1176 return query->perfcnt_offset + index;
1178 return query->a_offset + index;
1180 return query->b_offset + index;
1182 return query->c_offset + index;
1191 const struct intel_perf_query_info *query,
1196 const struct intel_perf_query_field_layout *layout = &query->perf->query_layout;
1197 const struct intel_device_info *devinfo = &query->perf->devinfo;
1211 intel_perf_query_result_accumulate(result, query,
1238 result->accumulator[query_accumulator_offset(query, field->type, field->index)] = v1 - v0;
1251 intel_perf_query_result_print_fields(const struct intel_perf_query_info *query,
1254 const struct intel_perf_query_field_layout *layout = &query->perf->query_layout;
1421 /* sort query groups by name */