Lines Matching refs:info
41 const struct isl_surf_init_info *restrict info,
51 if (isl_surf_usage_is_depth_or_stencil(info->usage))
54 if (info->usage & ISL_SURF_USAGE_DISPLAY_BIT)
61 if (info->usage & ISL_SURF_USAGE_MCS_BIT)
70 if (info->dim != ISL_SURF_DIM_2D)
74 if (info->dim != ISL_SURF_DIM_2D)
85 if (info->samples > 1)
89 if (isl_format_get_layout(info->format)->bpb % 3 == 0)
98 if (info->usage & ISL_SURF_USAGE_CPB_BIT)
104 const struct isl_surf_init_info *restrict info,
111 assert(info->format != ISL_FORMAT_GFX125_HIZ);
113 const struct isl_format_layout *fmtl = isl_format_get_layout(info->format);
131 isl_tiling_get_info(tiling, info->dim, msaa_layout, fmtl->bpb,
132 info->samples, &tile_info);
137 } else if (isl_surf_usage_is_depth(info->usage)) {
154 info->format != ISL_FORMAT_R16_UNORM ?
157 } else if (isl_surf_usage_is_stencil(info->usage)) {
199 const struct isl_surf_init_info *restrict info,
206 assert(info->format != ISL_FORMAT_HIZ);
208 const struct isl_format_layout *fmtl = isl_format_get_layout(info->format);
211 assert(info->levels == 1 && info->array_len == 1 && info->depth == 1);
216 if (isl_surf_usage_is_depth(info->usage)) {
229 assert(isl_is_pow2(info->samples));
231 info->format != ISL_FORMAT_R16_UNORM ?
233 (info->samples == 2 || info->samples == 8 ?
235 } else if (isl_surf_usage_is_stencil(info->usage)) {
238 isl_gfx9_choose_image_alignment_el(dev, info, tiling, dim_layout,