Lines Matching refs:state

827     * so the surface is in the pass-through state.
856 * Enum for keeping track of the state an auxiliary compressed surface.
924 * "Compressed w/o Clear" state is to render with HiZ when the surface is
943 * an ambiguate so it goes directly into the pass-through state. CCS_E also
948 * The state machine above isn't quite correct for CCS on TGL. There is a HW
950 * the fast-clear state as a side-effect of a regular draw call. This means
952 * the compressed with clear state, not the compressed without clear state.
960 * In this state, each block in the auxiliary surface contains a magic
961 * value that indicates that the block is in the clear state. If a block
962 * is in the clear state, its values in the primary surface are ignored
973 * In this state, each block in the auxiliary surface contains either the
981 * In this state, neither the auxiliary surface nor the primary surface has
987 * state (see Clear) and have their value taken from outside the surface.
993 * This state is identical to the state above except that no blocks are in
994 * the clear state. In this state, all of the data required to reconstruct
1002 * In this state, the primary surface contains 100% of the data. The
1012 * In this state, the primary surface contains 100% of the data and every
1018 * in the pass-through state. Writing to a surface in pass-through mode
1020 * non-trivial data and it will no longer be in the pass-through state.
1027 * In this state, the primary surface contains 100% of the data and the
1030 * that one can do to re-enable aux once this state is reached is to use an
1031 * ambiguate pass to transition into the pass-through state.
1039 * Even though a draw does transition the state machine, it's not included in
1054 * state to the clear state so long as the entire slice is fast cleared at
1066 * the way to the pass-through state.
1072 * This operation considers blocks which are in the "clear" state and
1250 /* size of the state buffer used to store the clear color + extra
1483 * when a surface state is constructed. It must, however, have the same
1638 * The Memory Object Control state for the filled surface state.
1700 * The Memory Object Control state for the filled surface state.
1707 * The format to use in the surface state
1715 * The swizzle to use in the surface state
1759 * The Memory Object Control state for depth and stencil buffers
1807 * The Memory Object Control state for the surface.
2127 * state.
2175 isl_aux_state_has_valid_primary(enum isl_aux_state state)
2177 return state == ISL_AUX_STATE_RESOLVED ||
2178 state == ISL_AUX_STATE_PASS_THROUGH ||
2179 state == ISL_AUX_STATE_AUX_INVALID;
2183 isl_aux_state_has_valid_aux(enum isl_aux_state state)
2185 return state != ISL_AUX_STATE_AUX_INVALID;
2207 * could be in state other than ISL_AUX_STATE_AUX_INVALID. In particular, it
2465 #define isl_surf_fill_state(dev, state, ...) \
2466 isl_surf_fill_state_s((dev), (state), \
2470 isl_surf_fill_state_s(const struct isl_device *dev, void *state,
2473 #define isl_buffer_fill_state(dev, state, ...) \
2474 isl_buffer_fill_state_s((dev), (state), \
2478 isl_buffer_fill_state_s(const struct isl_device *dev, void *state,
2482 isl_null_fill_state_s(const struct isl_device *dev, void *state,
2485 #define isl_null_fill_state(dev, state, ...) \
2486 isl_null_fill_state_s((dev), (state), \