Lines Matching refs:tiling
45 enum isl_tiling tiling,
52 tiling, copy_type);
59 tiling, copy_type);
68 enum isl_tiling tiling,
75 tiling, copy_type);
82 tiling, copy_type);
356 * @param[in] tiling The tiling format to introspect
362 * @param[out] tile_info Return parameter for the tiling information
365 isl_tiling_get_info(enum isl_tiling tiling,
376 if (tiling != ISL_TILING_LINEAR && !isl_is_pow2(format_bpb)) {
380 * This really only works on a subset of tiling formats.
382 assert(tiling == ISL_TILING_X || tiling == ISL_TILING_Y0 ||
383 tiling == ISL_TILING_4);
385 isl_tiling_get_info(tiling, dim, msaa_layout, format_bpb / 3, samples,
390 switch (tiling) {
429 bool is_Ys = tiling == ISL_TILING_Ys;
499 /* HiZ buffers are required to have a 128bpb HiZ format. The tiling has
500 * the same physical dimensions as Y-tiling but actually has two HiZ
559 .tiling = tiling,
614 * @param[out] tiling is set only on success
619 enum isl_tiling *tiling)
623 /* HiZ surfaces always use the HiZ tiling */
627 *tiling = isl_tiling_flag_to_enum(tiling_flags);
631 /* CCS surfaces always use the CCS tiling */
639 *tiling = isl_tiling_flag_to_enum(tiling_flags);
654 *tiling = (__tiling); \
659 /* Of the tiling modes remaining, choose the one that offers the best
665 * tiling. To the contrary, tiling leads to wasted memory and poor
683 /* No tiling mode accommodates the inputs. */
690 enum isl_tiling tiling,
694 return isl_gfx8_choose_msaa_layout(dev, info, tiling, msaa_layout);
696 return isl_gfx7_choose_msaa_layout(dev, info, tiling, msaa_layout);
698 return isl_gfx6_choose_msaa_layout(dev, info, tiling, msaa_layout);
700 return isl_gfx4_choose_msaa_layout(dev, info, tiling, msaa_layout);
855 enum isl_tiling tiling,
925 isl_gfx125_choose_image_alignment_el(dev, info, tiling, dim_layout,
928 isl_gfx12_choose_image_alignment_el(dev, info, tiling, dim_layout,
931 isl_gfx9_choose_image_alignment_el(dev, info, tiling, dim_layout,
934 isl_gfx8_choose_image_alignment_el(dev, info, tiling, dim_layout,
937 isl_gfx7_choose_image_alignment_el(dev, info, tiling, dim_layout,
940 isl_gfx6_choose_image_alignment_el(dev, info, tiling, dim_layout,
943 isl_gfx4_choose_image_alignment_el(dev, info, tiling, dim_layout,
951 enum isl_tiling tiling,
956 (tiling == ISL_TILING_W || tiling == ISL_TILING_HIZ))
964 * One-dimensional surfaces use a tiling mode of linear.
976 if (tiling == ISL_TILING_LINEAR)
1016 enum isl_tiling tiling,
1055 if (tiling == ISL_TILING_Ys && info->samples > 1)
1236 tile_info->tiling != ISL_TILING_LINEAR) {
1345 if (tile_info->tiling == ISL_TILING_64) {
1587 if (tile_info->tiling != ISL_TILING_LINEAR) {
1600 tile_info->tiling != ISL_TILING_X &&
1707 if (tile_info->tiling == ISL_TILING_LINEAR) {
1822 enum isl_tiling tiling;
1823 if (!isl_surf_choose_tiling(dev, info, &tiling))
1827 isl_surf_choose_dim_layout(dev, info->dim, tiling, info->usage);
1830 if (!isl_choose_msaa_layout(dev, info, tiling, &msaa_layout))
1834 isl_tiling_get_info(tiling, info->dim, msaa_layout, fmtl->bpb,
1838 isl_choose_image_alignment_el(dev, info, tiling, dim_layout, msaa_layout,
1845 isl_calc_phys_level0_extent_sa(dev, info, dim_layout, tiling, msaa_layout,
1866 if (tiling == ISL_TILING_LINEAR) {
1867 /* LINEAR tiling has no concept of intra-tile arrays */
1899 /* Pitches must make sense with the tiling */
1938 if (tiling == ISL_TILING_GFX12_CCS)
1985 .tiling = tiling,
2012 isl_tiling_get_info(surf->tiling, surf->dim, surf->msaa_layout, fmtl->bpb,
2151 * From the Skylake documentation, it is made clear that X-tiling is no
2165 if (surf->tiling == ISL_TILING_LINEAR)
2190 assert(hiz_surf->tiling == ISL_TILING_HIZ);
2234 /* TODO: Handle the other tiling formats */
2235 if (surf->tiling != ISL_TILING_Y0 && surf->tiling != ISL_TILING_4 &&
2236 surf->tiling != ISL_TILING_64)
2240 if (surf->samples == 1 && surf->tiling == ISL_TILING_64)
2279 /* From the Skylake documentation, it is made clear that X-tiling is no
2285 if (ISL_GFX_VER(dev) >= 9 && !isl_tiling_is_any_y(surf->tiling))
2342 } else if (surf->tiling == ISL_TILING_Y0) {
2349 } else if (surf->tiling == ISL_TILING_X) {
2357 unreachable("Invalid tiling format");
2497 assert(info->surf->tiling == ISL_TILING_4 ||
2498 info->surf->tiling == ISL_TILING_64);
2837 isl_tiling_get_intratile_offset_el(surf->tiling, surf->dim,
2888 isl_tiling_get_intratile_offset_el(surf->tiling, surf->dim,
2903 isl_tiling_get_intratile_offset_el(surf->tiling, surf->dim,
2963 .tiling_flags = (1 << surf->tiling));
3083 .tiling_flags = (1 << surf->tiling));
3099 isl_tiling_get_intratile_offset_el(enum isl_tiling tiling,
3116 if (tiling == ISL_TILING_LINEAR) {
3130 isl_tiling_get_info(tiling, dim, msaa_layout, bpb, samples, &tile_info);
3132 /* Pitches must make sense with the tiling */