Lines Matching defs:devinfo
86 #define intel_device_info_is_dg2(devinfo) \
87 intel_platform_in_range((devinfo)->platform, DG2)
424 #define intel_device_info_is_9lp(devinfo) \
425 (GFX_VER == 9 && ((devinfo)->platform == INTEL_PLATFORM_BXT || \
426 (devinfo)->platform == INTEL_PLATFORM_GLK))
430 #define intel_device_info_is_9lp(devinfo) \
431 ((devinfo)->platform == INTEL_PLATFORM_BXT || \
432 (devinfo)->platform == INTEL_PLATFORM_GLK)
437 intel_device_info_slice_available(const struct intel_device_info *devinfo,
441 return (devinfo->slice_masks & (1U << slice)) != 0;
445 intel_device_info_subslice_available(const struct intel_device_info *devinfo,
448 return (devinfo->subslice_masks[slice * devinfo->subslice_slice_stride +
453 intel_device_info_eu_available(const struct intel_device_info *devinfo,
456 unsigned subslice_offset = slice * devinfo->eu_slice_stride +
457 subslice * devinfo->eu_subslice_stride;
459 return (devinfo->eu_masks[subslice_offset + eu / 8] & (1U << eu % 8)) != 0;
463 intel_device_info_subslice_total(const struct intel_device_info *devinfo)
467 for (size_t i = 0; i < ARRAY_SIZE(devinfo->subslice_masks); i++) {
468 total += __builtin_popcount(devinfo->subslice_masks[i]);
475 intel_device_info_eu_total(const struct intel_device_info *devinfo)
479 for (size_t i = 0; i < ARRAY_SIZE(devinfo->eu_masks); i++)
480 total += __builtin_popcount(devinfo->eu_masks[i]);
487 const struct intel_device_info *devinfo)
495 intel_device_info_timebase_scale(const struct intel_device_info *devinfo,
501 uint64_t upper_scaled_ts = upper_ts * 1000000000ull / devinfo->timestamp_frequency;
502 uint64_t lower_scaled_ts = lower_ts * 1000000000ull / devinfo->timestamp_frequency;
507 intel_vram_all_mappable(const struct intel_device_info *devinfo)
509 return devinfo->mem.vram.unmappable.size == 0;
512 bool intel_get_device_info_from_fd(int fh, struct intel_device_info *devinfo);
514 struct intel_device_info *devinfo);
519 bool intel_device_info_update_memory_info(struct intel_device_info *devinfo,