Lines Matching refs:writemask
319 ubld.MOV(writemask(offset(tmp, 8, n), WRITEMASK_X), brw_imm_ud(di.i1));
320 ubld.MOV(writemask(offset(tmp, 8, n), WRITEMASK_Y), brw_imm_ud(di.i2));
347 unsigned writemask = 1 << i;
349 if ((remaining & writemask) == 0)
357 writemask |= 1 << j;
361 reg.writemask = writemask;
368 remaining &= ~writemask;
371 /* Set final writemask */
372 reg.writemask = brw_writemask_for_size(instr->def.num_components);
404 dest.writemask = brw_writemask_for_size(instr->num_components);
445 int writemask = WRITEMASK_X;
446 emit(MOV(dst_reg(MRF, param_base, glsl_type::int_type, writemask), lod));
495 * appropriate writemask in the dst register of the SEND instruction.
500 * 2) For Haswell+: Simply send a single write message but set the writemask
503 * and honor the writemask provided.
589 dest.writemask = brw_writemask_for_size(instr->num_components);
606 dest.writemask = WRITEMASK_XYZW;
1119 dst.writemask = instr->dest.write_mask;
1474 * to honor the original writemask.
1599 tmp1.writemask = WRITEMASK_X;
1604 tmp2.writemask = WRITEMASK_X;
1857 switch (dst.writemask) {
1920 masked.writemask = dst.writemask;
2143 inst->dst.writemask = WRITEMASK_XYZW;
2153 int writemask = devinfo->ver == 4 ? WRITEMASK_W : WRITEMASK_X;
2154 emit(MOV(dst_reg(MRF, param_base, lod.type, writemask), lod));
2157 inst->dst.writemask = WRITEMASK_X;
2185 int mrf, writemask;
2189 writemask = WRITEMASK_Y;
2192 writemask = WRITEMASK_X;
2197 writemask = WRITEMASK_W;
2199 emit(MOV(dst_reg(MRF, mrf, lod.type, writemask), lod));
2277 emit_minmax(BRW_CONDITIONAL_GE, writemask(inst->dst, WRITEMASK_Z),
2378 bld.group(4, 0).emit(mov_op, writemask(dst, WRITEMASK_XY), src);
2382 .emit(mov_op, writemask(dst, WRITEMASK_ZW),
2387 .emit(mov_op, writemask(byte_offset(dst, REG_SIZE), WRITEMASK_XY),
2392 .emit(mov_op, writemask(byte_offset(dst, REG_SIZE), WRITEMASK_ZW),