Lines Matching defs:bld
283 setup_imm_df(const vec4_builder &bld, double v)
285 const intel_device_info *devinfo = bld.shader->devinfo;
292 const vec4_builder ubld = bld.exec_all();
293 const dst_reg dst = bld.vgrf(BRW_REGISTER_TYPE_DF);
316 const dst_reg tmp = bld.vgrf(BRW_REGISTER_TYPE_UD, 2);
318 const vec4_builder ubld = bld.exec_all().group(4, n);
505 const vec4_builder bld = vec4_builder(this).at_end()
508 emit_untyped_write(bld, surf_index, offset_reg, val_reg,
525 const vec4_builder bld = vec4_builder(this).at_end()
528 src_reg read_result = emit_untyped_read(bld, surf_index, offset_reg,
715 const vec4_builder bld =
717 const dst_reg tmp = bld.vgrf(BRW_REGISTER_TYPE_UD);
719 bld.emit(SHADER_OPCODE_MEMORY_FENCE, tmp, brw_vec8_grf(0, 0));
756 const vec4_builder bld =
759 src_reg atomic_result = emit_untyped_atomic(bld, surface, offset,
765 bld.MOV(dest, atomic_result);
828 emit_find_msb_using_lzd(const vec4_builder &bld,
856 temp = src_reg(bld.vgrf(BRW_REGISTER_TYPE_D));
858 bld.ASR(dst_reg(temp), src, brw_imm_d(31));
859 bld.XOR(dst_reg(temp), temp, src);
862 bld.LZD(retype(dst, BRW_REGISTER_TYPE_UD),
870 inst = bld.ADD(dst, retype(src_reg(dst), BRW_REGISTER_TYPE_D),
1689 vec4_builder bld = vec4_builder(this).at_end();
1693 emit_find_msb_using_lzd(bld, dst, op[0], true);
1702 bld.CMP(dst_null_d(), src, brw_imm_d(-1), BRW_CONDITIONAL_NZ);
1704 inst = bld.ADD(dst, src, brw_imm_d(31));
1713 vec4_builder bld = vec4_builder(this).at_end();
1716 dst_reg temp = bld.vgrf(BRW_REGISTER_TYPE_D);
1730 bld.AND(temp, src, negated_src);
1731 emit_find_msb_using_lzd(bld, dst, src_reg(temp), false);
1733 bld.FBL(dst, op[0]);
2367 const vec4_builder bld = !ref ? vec4_builder(this).at_end() :
2373 bld.emit(mov_op, data, src);
2378 bld.group(4, 0).emit(mov_op, writemask(dst, WRITEMASK_XY), src);
2381 bld.group(4, for_write ? 1 : 0)
2386 bld.group(4, for_write ? 0 : 1)
2391 return bld.group(4, 1)