Lines Matching defs:be
12 * paragraph) shall be included in all copies or substantial portions of the
47 * The heuristic is the important part. We're trying to be cheap,
54 * Note that often there will be many things which could execute
94 * node. Among the scheduler nodes blocked by this node, this will be the
110 * which can be used to heuristically order nodes according to how early they
287 * The unit appears to be pipelined, since this matches up with the
354 * about 460. We expect to mostly be cache hot, so pick something more
366 * The cycles spent seemed to be grouped around 40-50 (as low as 38),
486 * seen to be reduced by a factor of 100.
773 fs_instruction_scheduler::count_reads_remaining(backend_instruction *be)
775 fs_inst *inst = (fs_inst *)be;
855 fs_instruction_scheduler::update_register_pressure(backend_instruction *be)
857 fs_inst *inst = (fs_inst *)be;
881 fs_instruction_scheduler::get_register_pressure_benefit(backend_instruction *be)
883 fs_inst *inst = (fs_inst *)be;
976 /* We can't measure Gfx6 timings directly but expect them to be much
1030 * nodes of its children which can be unblocked first according to the
1046 * The @after node will be scheduled after @before. We will try to
1131 /* instruction scheduling needs to be aware of when an MRF write
1151 /* Fixed HW registers are assumed to be separate from the virtual
1152 * GRFs, so they can be tracked separately. We don't really write
1415 /* Fixed HW registers are assumed to be separate from the virtual
1416 * GRFs, so they can be tracked separately. We don't really write
1681 * most likely to have its values able to be consumed first (such as
1683 * the instruction stream with respect to when they can be consumed).
1805 * children can be promoted to the list of instructions ready to
1806 * be scheduled. Update the children's unblocked time for this