Lines Matching refs:value
631 /* LZD of an absolute value source almost always does the right
640 * For a value of zero or negative one, -1 will be returned.
646 * 0xffffffff, the correct value is obtained from LZD if instead of
647 * negating the (already negative) value the logical-not is used. A
1308 * it won't result in a MUL, but will try to negate the value by other
1417 * final integer modulus value.
1806 /* (x & -x) generates a value that consists of only the LSB of x.
1848 * src1 are used an unsigned value for the shift count.
2033 bld.MOV(offset(reg, bld, i), setup_imm_b(bld, instr->value[i].i8));
2038 bld.MOV(offset(reg, bld, i), brw_imm_w(instr->value[i].i16));
2043 bld.MOV(offset(reg, bld, i), brw_imm_d(instr->value[i].i32));
2052 setup_imm_df(bld, instr->value[i].f64));
2056 bld.MOV(offset(reg, bld, i), brw_imm_q(instr->value[i].i64));
2104 * This function should not be called on any value which may be 64 bits.
2108 * value and treat it the same as the result of get_nir_src().
2186 * Computes 1 << x, given a D/UD register containing some value x.
3056 fs_reg value = get_nir_src(instr->src[0]);
3082 sources[i + first_component] = offset(value, bld, i);
3553 /* Re-emit the instruction that generated the Boolean value, but
3555 * other instructions that want to use the real Boolean value may
4058 nir_const_value value = nir_alu_binop_identity(op, type_sz(type) * 8);
4062 return brw_imm_uw(value.u8);
4065 return brw_imm_w(value.i8);
4068 return retype(brw_imm_uw(value.u16), type);
4070 return retype(brw_imm_ud(value.u32), type);
4073 return setup_imm_df(bld, value.f64);
4075 return retype(brw_imm_u64(value.u64), type);
4762 * per-channel and add the base UBO index; we have to select a value
5341 * with the identity value for the logical operation.
5373 * with the identity value for the logical operation.
5402 fs_reg value = get_nir_src(instr->src[0]);
5405 value.type = bit_size == 8 ? BRW_REGISTER_TYPE_B :
5409 fs_reg uniformized = bld.emit_uniformize(value);
5414 * with the identity value for the logical operation.
5423 bld.CMP(bld.null_reg_d(), value, uniformized, BRW_CONDITIONAL_Z);
5443 const fs_reg value = retype(get_nir_src(instr->src[0]),
5456 bld.CMP(bld.null_reg_ud(), value, brw_imm_ud(0u), BRW_CONDITIONAL_NZ);
5468 const fs_reg value = get_nir_src(instr->src[0]);
5470 fs_reg tmp = bld.vgrf(value.type);
5472 bld.exec_all().emit(SHADER_OPCODE_BROADCAST, tmp, value,
5475 bld.MOV(retype(dest, value.type), fs_reg(component(tmp, 0)));
5480 const fs_reg value = get_nir_src(instr->src[0]);
5481 bld.MOV(retype(dest, value.type), bld.emit_uniformize(value));
5486 const fs_reg value = get_nir_src(instr->src[0]);
5489 bld.emit(SHADER_OPCODE_SHUFFLE, retype(dest, value.type), value, index);
5510 const fs_reg value = get_nir_src(instr->src[0]);
5513 bld.emit(SHADER_OPCODE_CLUSTER_BROADCAST, retype(dest, value.type),
5514 value, brw_imm_ud(index), brw_imm_ud(4));
5519 const fs_reg value = get_nir_src(instr->src[0]);
5520 const fs_reg tmp = bld.vgrf(value.type);
5529 ubld.emit(SHADER_OPCODE_QUAD_SWIZZLE, tmp, value,
5531 bld.MOV(retype(dest, value.type), tmp);
5535 const fs_reg src_left = horiz_stride(value, 2);
5536 const fs_reg src_right = horiz_stride(horiz_offset(value, 1), 2);
5544 bld.MOV(retype(dest, value.type), tmp);
5549 const fs_reg value = get_nir_src(instr->src[0]);
5552 const fs_reg tmp = bld.vgrf(value.type);
5554 ubld.emit(SHADER_OPCODE_QUAD_SWIZZLE, tmp, value,
5556 bld.MOV(retype(dest, value.type), tmp);
5564 bld.emit(SHADER_OPCODE_SHUFFLE, retype(dest, value.type), value, idx);
5570 const fs_reg value = get_nir_src(instr->src[0]);
5573 const fs_reg tmp = bld.vgrf(value.type);
5575 ubld.emit(SHADER_OPCODE_QUAD_SWIZZLE, tmp, value,
5577 bld.MOV(retype(dest, value.type), tmp);
5585 bld.emit(SHADER_OPCODE_SHUFFLE, retype(dest, value.type), value, idx);
5607 * to reduction operation's identity value.
5653 * to reduction operation's identity value.
5973 /* There is no actual value to use in the destination register of the
6466 /* If mcs is an immediate value, it means there is no MCS. In that case
6701 * instruction allows to set the 64-bit immediate value.