Lines Matching defs:src0
512 nir_alu_instr *src0 =
515 if (src0->op != nir_op_extract_u8 && src0->op != nir_op_extract_u16 &&
516 src0->op != nir_op_extract_i8 && src0->op != nir_op_extract_i16)
519 unsigned element = nir_src_as_uint(src0->src[1].src);
523 src0->op == nir_op_extract_u16 || src0->op == nir_op_extract_i16 ? 2 : 1,
524 src0->op == nir_op_extract_i16 || src0->op == nir_op_extract_i8);
526 fs_reg op0 = get_nir_src(src0->src[0].src);
528 (nir_alu_type)(nir_op_infos[src0->op].input_types[0] |
529 nir_src_bit_size(src0->src[0].src)));
530 op0 = offset(op0, bld, src0->src[0].swizzle[0]);
540 nir_intrinsic_instr *src0 = nir_src_as_intrinsic(instr->src[0].src);
541 if (src0 == NULL || src0->intrinsic != nir_intrinsic_load_front_face)
1850 * Gen8: As with earlier platforms, but for Q and UQ types on src0, the low
1853 * Gen9+: The low bits of src1 matching the size of src0 (e.g., 4-bits for
1854 * W or UW src0).