Lines Matching defs:result
253 /* We then resolve the 0/1 result to 0/~0 boolean values by ANDing
503 const fs_reg &result)
532 bld.MOV(result, subscript(op0, type, element));
538 const fs_reg &result)
616 bld.AND(retype(result, BRW_REGISTER_TYPE_D), tmp, brw_imm_d(0xbf800000));
623 const fs_reg &result,
656 bld.LZD(retype(result, BRW_REGISTER_TYPE_UD),
660 * from the LSB side. Subtract the result from 31 to convert the MSB
664 inst = bld.ADD(result, retype(result, BRW_REGISTER_TYPE_D), brw_imm_d(31));
696 fs_reg result =
699 result.type = brw_type_for_nir_type(devinfo,
728 return result;
745 result = offset(result, bld, channel);
753 return result;
777 fs_reg result,
805 /* Ignore the saturate modifier, if there is one. The result of the
808 bld.ADD(result, op, brw_imm_d(1));
821 fs_reg result, fs_reg *op, unsigned fsign_src)
832 /* op[fsign_src] has the nominal result of the fsign, and op[1 -
869 result.type = BRW_REGISTER_TYPE_UW;
870 bld.AND(result, op[0], brw_imm_uw(0x8000u));
873 inst = bld.OR(result, result, brw_imm_uw(0x3c00u));
875 /* Use XOR here to get the result sign correct. */
876 inst = bld.XOR(result, result, retype(op[1], BRW_REGISTER_TYPE_UW));
889 result.type = BRW_REGISTER_TYPE_UD;
890 bld.AND(result, op[0], brw_imm_ud(0x80000000u));
893 inst = bld.OR(result, result, brw_imm_ud(0x3f800000u));
895 /* Use XOR here to get the result sign correct. */
896 inst = bld.XOR(result, result, retype(op[1], BRW_REGISTER_TYPE_UD));
905 * - We need to produce a DF result.
912 bld.MOV(result, zero);
914 fs_reg r = subscript(result, BRW_REGISTER_TYPE_UD, 1);
928 fs_reg result_int64 = retype(result, BRW_REGISTER_TYPE_UQ);
978 fs_reg result = prepare_alu_destination_and_sources(bld, instr, op, need_dest);
1020 fs_reg temp = result;
1026 temp = bld.vgrf(result.type, 4);
1053 bld.MOV(offset(result, bld, i), offset(temp, bld, i));
1061 if (optimize_extract_to_float(instr, result))
1063 inst = bld.MOV(result, op[0]);
1089 inst = bld.MOV(result, op[0]);
1100 if (try_emit_b2fi_of_inot(bld, result, instr))
1122 if (result.type == BRW_REGISTER_TYPE_B ||
1123 result.type == BRW_REGISTER_TYPE_UB ||
1124 result.type == BRW_REGISTER_TYPE_HF)
1130 assert(type_sz(result.type) < 8); /* brw_nir_lower_conversions */
1132 inst = bld.MOV(result, op[0]);
1169 inst = bld.MOV(result, op[0]);
1174 inst = bld.MOV(result, op[0]);
1181 inst = bld.MOV(result, op[0]);
1188 inst = bld.MOV(result, op[0]);
1200 assert(type_sz(result.type) < 8); /* brw_nir_lower_conversions */
1202 inst = bld.MOV(result, op[0]);
1206 emit_fsign(bld, instr, result, op, 0);
1210 inst = bld.emit(SHADER_OPCODE_RCP, result, op[0]);
1214 inst = bld.emit(SHADER_OPCODE_EXP2, result, op[0]);
1218 inst = bld.emit(SHADER_OPCODE_LOG2, result, op[0]);
1222 inst = bld.emit(SHADER_OPCODE_SIN, result, op[0]);
1226 inst = bld.emit(SHADER_OPCODE_COS, result, op[0]);
1230 inst = bld.emit(FS_OPCODE_DDX_FINE, result, op[0]);
1234 inst = bld.emit(FS_OPCODE_DDX_COARSE, result, op[0]);
1237 inst = bld.emit(FS_OPCODE_DDY_FINE, result, op[0]);
1241 inst = bld.emit(FS_OPCODE_DDY_COARSE, result, op[0]);
1253 inst = bld.ADD(result, op[0], op[1]);
1257 inst = bld.ADD3(result, op[0], op[1], op[2]);
1262 inst = bld.ADD(result, op[0], op[1]);
1267 bld.emit(SHADER_OPCODE_ISUB_SAT, result, op[0], op[1]);
1271 bld.emit(SHADER_OPCODE_USUB_SAT, result, op[0], op[1]);
1277 inst = bld.AVG(result, op[0], op[1]);
1283 fs_reg tmp = bld.vgrf(result.type);
1292 bld.AND(tmp, tmp, retype(brw_imm_ud(1), result.type));
1293 bld.AVG(result, op[0], op[1]);
1294 inst = bld.ADD(result, result, tmp);
1302 emit_fsign(bld, instr, result, op, i);
1308 * it won't result in a MUL, but will try to negate the value by other
1318 inst = bld.MUL(result, op[0], op[1]);
1323 bld.MUL(result, op[0], op[1]);
1350 bld.MUL(result, retype(op[0], dword_type), op[1]);
1356 bld.MUL(result, op[0], op[1]);
1363 bld.emit(SHADER_OPCODE_MULH, result, op[0], op[1]);
1367 bld.MOV(result, subscript(tmp, result.type, 1));
1374 bld.emit(SHADER_OPCODE_INT_QUOTIENT, result, op[0], op[1]);
1390 bld.emit(SHADER_OPCODE_INT_REMAINDER, result, op[0], op[1]);
1395 bld.emit(SHADER_OPCODE_INT_REMAINDER, result, op[0], op[1]);
1398 inst = bld.MOV(bld.null_reg_d(), result);
1415 /* If the result of the initial remainder operation is non-zero and the
1419 inst = bld.ADD(result, result, op[1]);
1428 fs_reg dest = result;
1437 bld.MOV(result, subscript(dest, BRW_REGISTER_TYPE_UD, 0));
1439 /* When we convert the result to 32-bit we need to be careful and do
1445 bld.MOV(retype(result, BRW_REGISTER_TYPE_D), retype(dest, src_type));
1456 fs_reg dest = result;
1466 bld.MOV(result, subscript(dest, BRW_REGISTER_TYPE_UD, 0));
1468 /* When we convert the result to 32-bit we need to be careful and do
1474 bld.MOV(retype(result, BRW_REGISTER_TYPE_D), retype(dest, src_type));
1498 result.type =
1520 bld.AND(result, op[0], op[1]);
1524 bld.OR(result, op[0], op[1]);
1528 bld.XOR(result, op[0], op[1]);
1537 bld.NOT(result, op[0]);
1543 bld.XOR(result, op[0], op[1]);
1549 bld.OR(result, op[0], op[1]);
1555 bld.AND(result, op[0], op[1]);
1579 inst = bld.emit(SHADER_OPCODE_SQRT, result, op[0]);
1583 inst = bld.emit(SHADER_OPCODE_RSQ, result, op[0]);
1609 bld.MOV(result, subscript(tmp, BRW_REGISTER_TYPE_UD, 0));
1619 bld.CMP(result, op[0], zero, BRW_CONDITIONAL_NZ);
1625 inst = bld.RNDZ(result, op[0]);
1629 bld.ADD(result, result, brw_imm_f(1.0f)));
1630 inst = bld.MOV(result, result); /* for potential saturation */
1639 inst = bld.MOV(result, temp);
1643 inst = bld.RNDD(result, op[0]);
1646 inst = bld.FRC(result, op[0]);
1649 inst = bld.RNDE(result, op[0]);
1653 bld.ADD(result, result, brw_imm_f(1.0f)));
1654 inst = bld.MOV(result, result); /* for potential saturation */
1681 inst = bld.SEL(result, zero, tmp32);
1689 inst = bld.emit_minmax(result, op[0], op[1], BRW_CONDITIONAL_L);
1695 inst = bld.emit_minmax(result, op[0], op[1], BRW_CONDITIONAL_GE);
1714 inst = bld.emit(BRW_OPCODE_F16TO32, result,
1722 inst = bld.emit(BRW_OPCODE_F16TO32, result,
1728 bld.emit(FS_OPCODE_PACK, result, op[0], op[1]);
1732 bld.emit(FS_OPCODE_PACK, result, op, 4);
1738 bld.MOV(result, subscript(op[0], BRW_REGISTER_TYPE_UD, 0));
1740 bld.MOV(result, subscript(op[0], BRW_REGISTER_TYPE_UD, 1));
1747 bld.MOV(result, subscript(op[0], BRW_REGISTER_TYPE_UW, 0));
1749 bld.MOV(result, subscript(op[0], BRW_REGISTER_TYPE_UW, 1));
1754 inst = bld.emit(SHADER_OPCODE_POW, result, op[0], op[1]);
1759 bld.BFREV(result, op[0]);
1764 bld.CBIT(result, op[0]);
1769 emit_find_msb_using_lzd(bld, result, op[0], false);
1775 bld.LZD(retype(result, BRW_REGISTER_TYPE_UD), op[0]);
1782 emit_find_msb_using_lzd(bld, result, op[0], true);
1784 bld.FBH(retype(result, BRW_REGISTER_TYPE_UD), op[0]);
1788 * (0xFFFFFFFF), then subtract the result from 31 to convert the MSB
1791 bld.CMP(bld.null_reg_d(), result, brw_imm_d(-1), BRW_CONDITIONAL_NZ);
1793 inst = bld.ADD(result, result, brw_imm_d(31));
1819 emit_find_msb_using_lzd(bld, result, temp, false);
1821 bld.FBL(result, op[0]);
1831 bld.BFE(result, op[2], op[1], op[0]);
1835 bld.BFI1(result, op[0], op[1]);
1839 bld.BFI2(result, op[0], op[1], op[2]);
1857 * different result on Gen9+ than on previous platforms:
1875 bld.SHL(result, op[0], op[1]);
1878 bld.ASR(result, op[0], op[1]);
1881 bld.SHR(result, op[0], op[1]);
1885 bld.ROL(result, op[0], op[1]);
1888 bld.ROR(result, op[0], op[1]);
1892 bld.emit(FS_OPCODE_PACK_HALF_2x16_SPLIT, result, op[0], op[1]);
1897 inst = bld.DP4A(retype(result, BRW_REGISTER_TYPE_D),
1908 inst = bld.DP4A(retype(result, BRW_REGISTER_TYPE_UD),
1919 inst = bld.DP4A(retype(result, BRW_REGISTER_TYPE_D),
1936 inst = bld.MAD(result, op[2], op[1], op[0]);
1947 inst = bld.LRP(result, op[0], op[1], op[2]);
1951 if (optimize_frontfacing_ternary(instr, result))
1955 inst = bld.SEL(result, op[1], op[2]);
1976 bld.MOV(result, w_temp);
1981 bld.SHR(result,
1986 bld.AND(result,
1992 bld.MOV(result, subscript(op[0], type, byte));
2001 bld.MOV(result, subscript(op[0], type, word));
2009 /* If we need to do a boolean resolve, replace the result with -(x & 1)
2013 !result.is_null() &&
2016 bld.AND(masked, result, brw_imm_d(1));
2018 bld.MOV(retype(result, BRW_REGISTER_TYPE_D), masked);
2108 * value and treat it the same as the result of get_nir_src().
2193 fs_reg result = bld.vgrf(x.type, 1);
2197 bld.SHL(result, one, x);
2198 return result;
3785 /* Use the result of the PI message. */
4424 * query instruction and splat the result out.
5340 * dead channels from affecting the result, we initialize the flag with
5356 * of 1-wide MOVs and scattering the result.
5372 * dead channels from affecting the result, we initialize the flag with
5388 * of 1-wide MOVs and scattering the result.
5413 * dead channels from affecting the result, we initialize the flag with
5429 * of 1-wide MOVs and scattering the result.
6599 * The returned result would be the following 4 32-bit components unshuffled: