Lines Matching defs:reg

92       fs_reg reg = bld.vgrf(BRW_REGISTER_TYPE_F, 4 * reg_size);
95          outputs[loc + i] = offset(reg, bld, 4 * i);
138    fs_reg *reg;
170          reg = &v->nir_system_values[SYSTEM_VALUE_INVOCATION_ID];
171          if (reg->file == BAD_FILE) {
176             *reg = iid;
183          reg = &v->nir_system_values[SYSTEM_VALUE_SAMPLE_POS];
184          if (reg->file == BAD_FILE)
185             *reg = v->emit_samplepos_setup();
190          reg = &v->nir_system_values[SYSTEM_VALUE_SAMPLE_ID];
191          if (reg->file == BAD_FILE)
192             *reg = v->emit_sampleid_setup();
198          reg = &v->nir_system_values[SYSTEM_VALUE_SAMPLE_MASK_IN];
199          if (reg->file == BAD_FILE)
200             *reg = v->emit_samplemaskin_setup();
205          reg = &v->nir_system_values[SYSTEM_VALUE_WORKGROUP_ID];
206          if (reg->file == BAD_FILE)
207             *reg = v->emit_work_group_id_setup();
212          reg = &v->nir_system_values[SYSTEM_VALUE_HELPER_INVOCATION];
213          if (reg->file == BAD_FILE) {
261             *reg = dst;
266          reg = &v->nir_system_values[SYSTEM_VALUE_FRAG_SHADING_RATE];
267          if (reg->file == BAD_FILE)
268             *reg = v->emit_shading_rate_setup();
292       fs_reg &reg = nir_system_values[SYSTEM_VALUE_SUBGROUP_INVOCATION];
293       reg = abld.vgrf(BRW_REGISTER_TYPE_UW);
296       allbld8.MOV(reg, brw_imm_v(0x76543210));
298          allbld8.ADD(byte_offset(reg, 16), reg, brw_imm_uw(8u));
301          allbld16.ADD(byte_offset(reg, 32), reg, brw_imm_uw(16u));
318    foreach_list_typed(nir_register, reg, node, &impl->registers) {
320          reg->num_array_elems == 0 ? 1 : reg->num_array_elems;
321       unsigned size = array_elems * reg->num_components;
322       const brw_reg_type reg_type = reg->bit_size == 8 ? BRW_REGISTER_TYPE_B :
323          brw_reg_type_from_bit_size(reg->bit_size, BRW_REGISTER_TYPE_F);
324       nir_locals[reg->index] = bld.vgrf(reg_type, size);
1024              instr->dest.dest.reg.reg == instr->src[i].src.reg.reg) {
2028    fs_reg reg = bld.vgrf(reg_type, instr->def.num_components);
2033          bld.MOV(offset(reg, bld, i), setup_imm_b(bld, instr->value[i].i8));
2038          bld.MOV(offset(reg, bld, i), brw_imm_w(instr->value[i].i16));
2043          bld.MOV(offset(reg, bld, i), brw_imm_d(instr->value[i].i32));
2051             bld.MOV(retype(offset(reg, bld, i), BRW_REGISTER_TYPE_DF),
2056             bld.MOV(offset(reg, bld, i), brw_imm_q(instr->value[i].i64));
2064    nir_ssa_values[instr->def.index] = reg;
2070    fs_reg reg;
2075          reg = bld.vgrf(reg_type, src.ssa->num_components);
2077          reg = nir_ssa_values[src.ssa->index];
2081       assert(src.reg.indirect == NULL);
2082       reg = offset(nir_locals[src.reg.reg->index], bld,
2083                    src.reg.base_offset * src.reg.reg->num_components);
2088       reg.type = BRW_REGISTER_TYPE_DF;
2094       reg.type = brw_reg_type_from_bit_size(nir_src_bit_size(src),
2098    return reg;
2133       assert(dest.reg.indirect == NULL);
2134       return offset(nir_locals[dest.reg.reg->index], bld,
2135                     dest.reg.base_offset * dest.reg.reg->num_components);
2393    /* reg::sid = stream_id */
2397    /* reg:shift_count = 2 * (vertex_count - 1) */