Lines Matching refs:ud
366 switch (src[1].ud) {
677 return src[FB_WRITE_LOGICAL_SRC_COMPONENTS].ud;
701 return src[TEX_LOGICAL_SRC_COORD_COMPONENTS].ud;
705 return src[TEX_LOGICAL_SRC_GRAD_COMPONENTS].ud;
725 return src[SURFACE_LOGICAL_SRC_IMM_DIMS].ud;
738 return src[SURFACE_LOGICAL_SRC_IMM_DIMS].ud;
741 return src[SURFACE_LOGICAL_SRC_IMM_ARG].ud;
754 const unsigned comps = src[2].ud / exec_size;
769 const unsigned comps = src[SURFACE_LOGICAL_SRC_IMM_ARG].ud / exec_size;
778 return i == 1 ? src[2].ud : 1;
786 const unsigned op = src[2].ud;
807 const unsigned op = src[2].ud;
836 const unsigned op = src[SURFACE_LOGICAL_SRC_IMM_ARG].ud;
839 return src[SURFACE_LOGICAL_SRC_IMM_DIMS].ud;
855 const unsigned op = src[SURFACE_LOGICAL_SRC_IMM_ARG].ud;
858 return src[SURFACE_LOGICAL_SRC_IMM_DIMS].ud;
936 return src[2].ud;
2781 const unsigned comp = inst->src[1].ud & (inst->exec_size - 1);
2797 inst->src[1].ud);
3761 ex_desc = brw_imm_ud(lsc_bti_ex_desc(devinfo, surface.ud));
3793 brw_imm_ud(offset_B.ud / 16));
3926 const bool ud = (inst->src[1].type == BRW_REGISTER_TYPE_UD);
3928 (( ud && inst->src[1].ud <= UINT16_MAX) ||
3929 (!ud && inst->src[1].d <= INT16_MAX && inst->src[1].d >= INT16_MIN))) {
3943 ud ? brw_imm_uw(inst->src[1].ud)
4036 brw_imm_uw(inst->src[1].ud & 0xffff));
4038 brw_imm_uw(inst->src[1].ud >> 16));
4165 mul->src[1] = brw_imm_uw(mul->src[1].ud);
5071 const unsigned swiz = inst->src[1].ud;
5769 fprintf(file, "%-ghf", _mesa_half_to_float(inst->src[i].ud & 0xffff));
5783 fprintf(file, "%uu", inst->src[i].ud);
5793 brw_vf_to_float((inst->src[i].ud >> 0) & 0xff),
5794 brw_vf_to_float((inst->src[i].ud >> 8) & 0xff),
5795 brw_vf_to_float((inst->src[i].ud >> 16) & 0xff),
5796 brw_vf_to_float((inst->src[i].ud >> 24) & 0xff));
5800 fprintf(file, "%08x%s", inst->src[i].ud,