Lines Matching refs:target
3038 * halt-target
3064 /* Delete any HALTs immediately before the halt target. */
3368 write->target = 0;
3388 write->target = i;
3569 * same time that both consider ‘r3’ as the target of their final writes.
5317 * after \p inst, inst->next is a moving target and we need to save
5323 * However, certain render target writes require that the low group
5334 * "When SIMD32 or SIMD16 PS threads send render target writes
5339 * render target write irrespective of the slot's validity. A slot
5341 * example, a SIMD16 PS thread must send two SIMD8 render target
5344 * PS thread must send SIMD render target write messages with
5346 * Slot[15:0] and if two SIMD8 render target writes are used, the
5347 * first SIMD8 render target write must send Slot[7:0] and the
5351 * instructions (this is required for some render target writes), we
7427 * offset to determine render target 0 store instruction in