Lines Matching defs:bld
166 fs_visitor::VARYING_PULL_CONSTANT_LOAD(const fs_builder &bld,
185 bld.ADD(vec4_offset, varying_offset, brw_imm_ud(const_offset & ~0xf));
193 fs_reg vec4_result = bld.vgrf(BRW_REGISTER_TYPE_F, 4);
194 fs_inst *inst = bld.emit(FS_OPCODE_VARYING_PULL_CONSTANT_LOAD_LOGICAL,
199 shuffle_from_32bit_read(bld, dst, vec4_result,
208 fs_visitor::DEP_RESOLVE_MOV(const fs_builder &bld, int grf)
213 const fs_builder ubld = bld.annotate("send dependency resolve")
560 fs_visitor::get_timestamp(const fs_builder &bld)
574 bld.group(4, 0).exec_all().MOV(dst, ts);
1161 bld.MOV(wpos, this->pixel_x);
1162 wpos = offset(wpos, bld, 1);
1165 bld.MOV(wpos, this->pixel_y);
1166 wpos = offset(wpos, bld, 1);
1170 bld.MOV(wpos, this->pixel_z);
1172 bld.emit(FS_OPCODE_LINTERP, wpos,
1176 wpos = offset(wpos, bld, 1);
1179 bld.MOV(wpos, this->wpos_w);
1228 fs_reg ff = bld.vgrf(BRW_REGISTER_TYPE_D);
1233 fs_reg tmp = bld.vgrf(BRW_REGISTER_TYPE_W);
1234 bld.ASR(tmp, g1, brw_imm_d(15));
1235 bld.NOT(ff, tmp);
1251 bld.ASR(ff, g0, brw_imm_d(15));
1266 bld.ASR(ff, g1_6, brw_imm_d(31));
1279 const fs_builder abld = bld.annotate("compute sample position");
1288 bld.MOV(offset(pos, bld, 0), brw_imm_f(0.5f));
1289 bld.MOV(offset(pos, bld, 1), brw_imm_f(0.5f));
1308 fs_reg tmp_d = bld.vgrf(BRW_REGISTER_TYPE_D);
1311 fs_reg tmp_f = bld.vgrf(BRW_REGISTER_TYPE_F);
1327 const fs_builder abld = bld.annotate("compute sample id");
1430 fs_reg mask = bld.vgrf(BRW_REGISTER_TYPE_D);
1436 fetch_payload_reg(bld, payload.sample_mask_in_reg, BRW_REGISTER_TYPE_D);
1449 const fs_builder abld = bld.annotate("compute gl_SampleMaskIn");
1471 const fs_builder abld = bld.annotate("compute fragment shading rate");
1475 brw_wm_prog_data(bld.shader->stage_prog_data);
1492 fs_reg int_rate_x = bld.vgrf(BRW_REGISTER_TYPE_UD);
1493 fs_reg int_rate_y = bld.vgrf(BRW_REGISTER_TYPE_UD);
1512 fs_reg temp = bld.vgrf(src.type);
1513 bld.MOV(temp, src);
1529 const fs_builder abld = bld.annotate("thread end");
1591 fs_builder ubld = bld.exec_all().group(8, 0).at(
1700 fs_builder ubld = bld.exec_all().group(8, 0).at(
3350 mov = bld.exec_all().group(4, 0)
3359 mov = bld.exec_all().group(4, 0)
3365 write = bld.emit(FS_OPCODE_REP_FB_WRITE);
3376 bld.exec_all().group(16, 0)
3381 bld.exec_all().group(1, 0)
3385 write = bld.emit(FS_OPCODE_REP_FB_WRITE);
4372 * thread payload, \p bld is required to have a dispatch_width() not greater
4376 brw_sample_mask_reg(const fs_builder &bld)
4378 const fs_visitor *v = static_cast<const fs_visitor *>(bld.shader);
4383 assert(bld.dispatch_width() <= 16);
4384 return brw_flag_subreg(sample_mask_flag_subreg(v) + bld.group() / 16);
4386 assert(v->devinfo->ver >= 6 && bld.dispatch_width() <= 16);
4387 return retype(brw_vec1_grf((bld.group() >= 16 ? 2 : 1), 7),
4428 brw_emit_predicate_on_sample_mask(const fs_builder &bld, fs_inst *inst)
4430 assert(bld.shader->stage == MESA_SHADER_FRAGMENT &&
4431 bld.group() == inst->group &&
4432 bld.dispatch_width() == inst->exec_size);
4434 const fs_visitor *v = static_cast<const fs_visitor *>(bld.shader);
4435 const fs_reg sample_mask = brw_sample_mask_reg(bld);
4444 bld.group(1, 0).exec_all()
4472 bld.MOV(result, brw_imm_ud(0));
4475 unsigned width = bld.dispatch_width();
4477 const fs_builder b = bld.group(MIN2(width, 16), i);
5295 const fs_builder ibld = bld.at(block, inst)
5561 const fs_builder ubld = bld.at(block, inst).exec_all().group(1, 0);
6029 /* bld is the common builder object pointing at the end of the program we
6034 * wouldn't have access to bld at all, but they do, so just in case some
6040 bld = fs_builder(this, 64);
6224 const fs_builder ibld = bld.at(block, inst).exec_all().group(16, 0);
6673 fs_reg t = bld.vgrf(BRW_REGISTER_TYPE_UD);
6674 bld.AND(t, fs_reg(retype(brw_vec1_grf(0, 2), BRW_REGISTER_TYPE_UD)),
6677 invocation_id = bld.vgrf(BRW_REGISTER_TYPE_UD);
6681 bld.SHR(invocation_id, t, brw_imm_ud(instance_id_shift));
6687 fs_reg channels_uw = bld.vgrf(BRW_REGISTER_TYPE_UW);
6688 fs_reg channels_ud = bld.vgrf(BRW_REGISTER_TYPE_UD);
6689 bld.MOV(channels_uw, fs_reg(brw_imm_uv(0x76543210)));
6690 bld.MOV(channels_ud, channels_uw);
6695 fs_reg instance_times_8 = bld.vgrf(BRW_REGISTER_TYPE_UD);
6696 bld.SHR(instance_times_8, t, brw_imm_ud(instance_id_shift - 3));
6697 bld.ADD(invocation_id, instance_times_8, channels_ud);
6735 bld.CMP(bld.null_reg_ud(), invocation_id,
6737 bld.IF(BRW_PREDICATE_NORMAL);
6743 bld.emit(BRW_OPCODE_ENDIF);
6751 fs_inst *inst = bld.emit(SHADER_OPCODE_URB_WRITE_LOGICAL,
6820 const fs_builder abld = bld.annotate("initialize control data bits");
6910 bld.exec_all().group(1, 0)
6911 .MOV(brw_sample_mask_reg(bld.group(lower_width, i)),
6958 const fs_builder abld = bld.exec_all().group(1, 0);
7642 fs_reg id = bld.vgrf(BRW_REGISTER_TYPE_UD, 3);
7645 bld.MOV(id, r0_1);
7650 bld.MOV(offset(id, bld, 1), r0_6);
7651 bld.MOV(offset(id, bld, 2), r0_7);
7654 bld.MOV(offset(id, bld, 1), brw_imm_ud(0));
7655 bld.MOV(offset(id, bld, 2), brw_imm_ud(0));
8111 brw_fs_test_dispatch_packing(const fs_builder &bld)
8113 const gl_shader_stage stage = bld.shader->stage;
8116 brw_wm_prog_data(bld.shader->stage_prog_data)->uses_vmask;
8118 if (brw_stage_has_packed_dispatch(bld.shader->devinfo, stage,
8119 bld.shader->stage_prog_data)) {
8120 const fs_builder ubld = bld.exec_all().group(1, 0);
8121 const fs_reg tmp = component(bld.vgrf(BRW_REGISTER_TYPE_UD), 0);
8130 bld.emit(BRW_OPCODE_DO);
8131 bld.CMP(bld.null_reg_ud(), tmp, brw_imm_ud(0), BRW_CONDITIONAL_NZ);
8132 set_predicate(BRW_PREDICATE_NORMAL, bld.emit(BRW_OPCODE_WHILE));