Lines Matching refs:reg
71 gfx7_convert_mrf_to_grf(struct brw_codegen *p, struct brw_reg *reg)
82 if (devinfo->ver >= 7 && reg->file == BRW_MESSAGE_REGISTER_FILE) {
83 reg->file = BRW_GENERAL_REGISTER_FILE;
84 reg->nr += GFX7_MRF_HACK_START;
209 brw_set_src0(struct brw_codegen *p, brw_inst *inst, struct brw_reg reg)
213 if (reg.file == BRW_MESSAGE_REGISTER_FILE)
214 assert((reg.nr & ~BRW_MRF_COMPR4) < BRW_MAX_MRF(devinfo->ver));
215 else if (reg.file == BRW_GENERAL_REGISTER_FILE)
216 assert(reg.nr < 128);
218 gfx7_convert_mrf_to_grf(p, ®);
229 assert(!reg.negate);
230 assert(!reg.abs);
231 assert(reg.address_mode == BRW_ADDRESS_DIRECT);
237 assert(reg.file != BRW_IMMEDIATE_VALUE);
238 assert(reg.address_mode == BRW_ADDRESS_DIRECT);
239 assert(reg.subnr == 0);
240 assert(has_scalar_region(reg) ||
241 (reg.hstride == BRW_HORIZONTAL_STRIDE_1 &&
242 reg.vstride == reg.width + 1));
243 assert(!reg.negate && !reg.abs);
244 brw_inst_set_send_src0_reg_file(devinfo, inst, reg.file);
245 brw_inst_set_src0_da_reg_nr(devinfo, inst, reg.nr);
249 assert(reg.file == BRW_GENERAL_REGISTER_FILE);
250 assert(reg.address_mode == BRW_ADDRESS_DIRECT);
251 assert(reg.subnr % 16 == 0);
252 assert(has_scalar_region(reg) ||
253 (reg.hstride == BRW_HORIZONTAL_STRIDE_1 &&
254 reg.vstride == reg.width + 1));
255 assert(!reg.negate && !reg.abs);
256 brw_inst_set_src0_da_reg_nr(devinfo, inst, reg.nr);
257 brw_inst_set_src0_da16_subreg_nr(devinfo, inst, reg.subnr / 16);
259 brw_inst_set_src0_file_type(devinfo, inst, reg.file, reg.type);
260 brw_inst_set_src0_abs(devinfo, inst, reg.abs);
261 brw_inst_set_src0_negate(devinfo, inst, reg.negate);
262 brw_inst_set_src0_address_mode(devinfo, inst, reg.address_mode);
264 if (reg.file == BRW_IMMEDIATE_VALUE) {
265 if (reg.type == BRW_REGISTER_TYPE_DF ||
267 brw_inst_set_imm_df(devinfo, inst, reg.df);
268 else if (reg.type == BRW_REGISTER_TYPE_UQ ||
269 reg.type == BRW_REGISTER_TYPE_Q)
270 brw_inst_set_imm_uq(devinfo, inst, reg.u64);
272 brw_inst_set_imm_ud(devinfo, inst, reg.ud);
274 if (devinfo->ver < 12 && type_sz(reg.type) < 8) {
281 if (reg.address_mode == BRW_ADDRESS_DIRECT) {
282 brw_inst_set_src0_da_reg_nr(devinfo, inst, reg.nr);
284 brw_inst_set_src0_da1_subreg_nr(devinfo, inst, reg.subnr);
286 brw_inst_set_src0_da16_subreg_nr(devinfo, inst, reg.subnr / 16);
289 brw_inst_set_src0_ia_subreg_nr(devinfo, inst, reg.subnr);
292 brw_inst_set_src0_ia1_addr_imm(devinfo, inst, reg.indirect_offset);
294 brw_inst_set_src0_ia16_addr_imm(devinfo, inst, reg.indirect_offset);
299 if (reg.width == BRW_WIDTH_1 &&
305 brw_inst_set_src0_hstride(devinfo, inst, reg.hstride);
306 brw_inst_set_src0_width(devinfo, inst, reg.width);
307 brw_inst_set_src0_vstride(devinfo, inst, reg.vstride);
311 BRW_GET_SWZ(reg.swizzle, BRW_CHANNEL_X));
313 BRW_GET_SWZ(reg.swizzle, BRW_CHANNEL_Y));
315 BRW_GET_SWZ(reg.swizzle, BRW_CHANNEL_Z));
317 BRW_GET_SWZ(reg.swizzle, BRW_CHANNEL_W));
319 if (reg.vstride == BRW_VERTICAL_STRIDE_8) {
325 reg.type == BRW_REGISTER_TYPE_DF &&
326 reg.vstride == BRW_VERTICAL_STRIDE_2) {
336 brw_inst_set_src0_vstride(devinfo, inst, reg.vstride);
345 brw_set_src1(struct brw_codegen *p, brw_inst *inst, struct brw_reg reg)
349 if (reg.file == BRW_GENERAL_REGISTER_FILE)
350 assert(reg.nr < 128);
357 assert(reg.file == BRW_GENERAL_REGISTER_FILE ||
358 reg.file == BRW_ARCHITECTURE_REGISTER_FILE);
359 assert(reg.address_mode == BRW_ADDRESS_DIRECT);
360 assert(reg.subnr == 0);
361 assert(has_scalar_region(reg) ||
362 (reg.hstride == BRW_HORIZONTAL_STRIDE_1 &&
363 reg.vstride == reg.width + 1));
364 assert(!reg.negate && !reg.abs);
365 brw_inst_set_send_src1_reg_nr(devinfo, inst, reg.nr);
366 brw_inst_set_send_src1_reg_file(devinfo, inst, reg.file);
373 assert(reg.file != BRW_ARCHITECTURE_REGISTER_FILE ||
374 reg.nr != BRW_ARF_ACCUMULATOR);
376 gfx7_convert_mrf_to_grf(p, ®);
377 assert(reg.file != BRW_MESSAGE_REGISTER_FILE);
379 brw_inst_set_src1_file_type(devinfo, inst, reg.file, reg.type);
380 brw_inst_set_src1_abs(devinfo, inst, reg.abs);
381 brw_inst_set_src1_negate(devinfo, inst, reg.negate);
387 if (reg.file == BRW_IMMEDIATE_VALUE) {
389 assert(type_sz(reg.type) < 8);
390 brw_inst_set_imm_ud(devinfo, inst, reg.ud);
395 assert (reg.address_mode == BRW_ADDRESS_DIRECT);
396 /* assert (reg.file == BRW_GENERAL_REGISTER_FILE); */
398 brw_inst_set_src1_da_reg_nr(devinfo, inst, reg.nr);
400 brw_inst_set_src1_da1_subreg_nr(devinfo, inst, reg.subnr);
402 brw_inst_set_src1_da16_subreg_nr(devinfo, inst, reg.subnr / 16);
406 if (reg.width == BRW_WIDTH_1 &&
412 brw_inst_set_src1_hstride(devinfo, inst, reg.hstride);
413 brw_inst_set_src1_width(devinfo, inst, reg.width);
414 brw_inst_set_src1_vstride(devinfo, inst, reg.vstride);
418 BRW_GET_SWZ(reg.swizzle, BRW_CHANNEL_X));
420 BRW_GET_SWZ(reg.swizzle, BRW_CHANNEL_Y));
422 BRW_GET_SWZ(reg.swizzle, BRW_CHANNEL_Z));
424 BRW_GET_SWZ(reg.swizzle, BRW_CHANNEL_W));
426 if (reg.vstride == BRW_VERTICAL_STRIDE_8) {
432 reg.type == BRW_REGISTER_TYPE_DF &&
433 reg.vstride == BRW_VERTICAL_STRIDE_2) {
443 brw_inst_set_src1_vstride(devinfo, inst, reg.vstride);
755 get_3src_subreg_nr(struct brw_reg reg)
761 return reg.subnr / 4;
1982 * just to use the flag reg for most WM tasks?
2183 * reg.
2194 /* set message header global offset field (reg 0, element 2) */
2312 /* set message header global offset field (reg 0, element 2) */
2413 /* set message header global offset field (reg 0, element 2) */